src/southbridge/amd/amd8151/amd8151_agp3.c

   1 /*
   2  *  Copyright 2003 Tyan
   3  *
   4  *      Author: Yinghai Lu
   5  */
   6 #include <console/console.h>
   7 #include <device/device.h>
   8 #include <device/pci.h>
   9 #include <device/pci_ids.h>
  10 #include <device/pci_ops.h>
  11
  12 static void agp3bridge_init(device_t dev)
  13 {
  14         uint8_t byte;
  15
  16         /* Enable BM, MEM and IO */
  17         byte = pci_read_config32(dev, 0x04);
  18         byte |= 0x07;
  19         pci_write_config8(dev, 0x04, byte);
  20
  21         return;
  22 }
  23
  24 static struct device_operations agp3bridge_ops  = {
  25         .read_resources   = pci_bus_read_resources,
  26         .set_resources    = pci_dev_set_resources,
  27         .enable_resources = pci_bus_enable_resources,
  28         .init             = agp3bridge_init,
  29         .scan_bus         = pci_scan_bridge,
  30 };
  31
  32 static const struct pci_driver agp3bridge_driver __pci_driver = {
  33         .ops    = &agp3bridge_ops,
  34         .vendor = PCI_VENDOR_ID_AMD,
  35         .device = 0x7455, // AGP Bridge
  36 };
  37
  38 static void agp3dev_enable(device_t dev)
  39 {
  40         uint32_t value;
  41
  42         /* AGP enable */
  43         value = pci_read_config32(dev, 0xa8);
  44         value |= (3<<8)|2; //AGP 8x
  45         pci_write_config32(dev, 0xa8, value);
  46
  47         /* enable BM and MEM */
  48         value = pci_read_config32(dev, 0x4);
  49         value |= 6;
  50         pci_write_config32(dev, 0x4, value);
  51 #if 0
  52         /* FIXME: should we add agp aperture base and size here ?
  53          * or it is done by AGP drivers */
  54 #endif
  55 }
  56
  57 static struct pci_operations pci_ops_pci_dev = {
  58         .set_subsystem    = pci_dev_set_subsystem,
  59 };
  60
  61 static struct device_operations agp3dev_ops = {
  62         .read_resources   = pci_dev_read_resources,
  63         .set_resources    = pci_dev_set_resources,
  64         .enable_resources = pci_dev_enable_resources,
  65         .init     = 0,
  66         .scan_bus = 0,
  67         .enable   = agp3dev_enable,
  68         .ops_pci  = &pci_ops_pci_dev,
  69 };
  70
  71 static const struct pci_driver agp3dev_driver __pci_driver = {
  72         .ops    = &agp3dev_ops,
  73         .vendor = PCI_VENDOR_ID_AMD,
  74         .device = 0x7454, //AGP Device
  75 };