1 #include <console/console.h>
2 #include <device/device.h>
3 #include <device/pci.h>
4 #include <device/pci_ids.h>
5 #include <device/chip.h>
8 void amd8111_enable(device_t dev)
13 uint16_t reg_old, reg;
15 /* See if we are on the behind the amd8111 pci bridge */
16 bus_dev = dev->bus->dev;
17 if ((bus_dev->vendor == PCI_VENDOR_ID_AMD) &&
18 (bus_dev->device == PCI_DEVICE_ID_AMD_8111_PCI)) {
20 devfn = bus_dev->path.u.pci.devfn + (1 << 3);
21 lpc_dev = dev_find_slot(bus_dev->bus->secondary, devfn);
22 index = ((dev->path.u.pci.devfn & ~7) >> 3) + 8;
25 devfn = (dev->path.u.pci.devfn) & ~7;
26 lpc_dev = dev_find_slot(dev->bus->secondary, devfn);
27 index = dev->path.u.pci.devfn & 7;
29 if ((!lpc_dev) || (index >= 16) ||
30 (lpc_dev->vendor != PCI_VENDOR_ID_AMD) ||
31 (lpc_dev->device != PCI_DEVICE_ID_AMD_8111_ISA)) {
35 reg = reg_old = pci_read_config16(lpc_dev, 0x48);
42 printk_warning("amd8111_enable dev: %s", dev_path(dev));
43 printk_warning(" lpc_dev: %s index: %d reg: %04x -> %04x ",
44 dev_path(lpc_dev), index, reg_old, reg);
46 pci_write_config16(lpc_dev, 0x48, reg);
48 printk_warning("done\n");
53 struct chip_control southbridge_amd_amd8111_control = {
55 .enable_dev = amd8111_enable,