1 #include <console/console.h>
3 #include <pc80/mc146818rtc.h>
4 #include <boot/coreboot_tables.h>
7 /* control registers - Moto names
15 /**********************************************************************
17 **********************************************************************/
18 #define RTC_FREQ_SELECT RTC_REG_A
20 /* update-in-progress - set to "1" 244 microsecs before RTC goes off the bus,
21 * reset after update (may take 1.984ms @ 32768Hz RefClock) is complete,
22 * totalling to a max high interval of 2.228 ms.
25 # define RTC_DIV_CTL 0x70
26 /* divider control: refclock values 4.194 / 1.049 MHz / 32.768 kHz */
27 # define RTC_REF_CLCK_4MHZ 0x00
28 # define RTC_REF_CLCK_1MHZ 0x10
29 # define RTC_REF_CLCK_32KHZ 0x20
30 /* 2 values for divider stage reset, others for "testing purposes only" */
31 # define RTC_DIV_RESET1 0x60
32 # define RTC_DIV_RESET2 0x70
33 /* Periodic intr. / Square wave rate select. 0=none, 1=32.8kHz,... 15=2Hz */
34 # define RTC_RATE_SELECT 0x0F
35 # define RTC_RATE_NONE 0x00
36 # define RTC_RATE_32786HZ 0x01
37 # define RTC_RATE_16384HZ 0x02
38 # define RTC_RATE_8192HZ 0x03
39 # define RTC_RATE_4096HZ 0x04
40 # define RTC_RATE_2048HZ 0x05
41 # define RTC_RATE_1024HZ 0x06
42 # define RTC_RATE_512HZ 0x07
43 # define RTC_RATE_256HZ 0x08
44 # define RTC_RATE_128HZ 0x09
45 # define RTC_RATE_64HZ 0x0a
46 # define RTC_RATE_32HZ 0x0b
47 # define RTC_RATE_16HZ 0x0c
48 # define RTC_RATE_8HZ 0x0d
49 # define RTC_RATE_4HZ 0x0e
50 # define RTC_RATE_2HZ 0x0f
52 /**********************************************************************/
53 #define RTC_CONTROL RTC_REG_B
54 # define RTC_SET 0x80 /* disable updates for clock setting */
55 # define RTC_PIE 0x40 /* periodic interrupt enable */
56 # define RTC_AIE 0x20 /* alarm interrupt enable */
57 # define RTC_UIE 0x10 /* update-finished interrupt enable */
58 # define RTC_SQWE 0x08 /* enable square-wave output */
59 # define RTC_DM_BINARY 0x04 /* all time/date values are BCD if clear */
60 # define RTC_24H 0x02 /* 24 hour mode - else hours bit 7 means pm */
61 # define RTC_DST_EN 0x01 /* auto switch DST - works f. USA only */
63 /**********************************************************************/
64 #define RTC_INTR_FLAGS RTC_REG_C
65 /* caution - cleared by read */
66 # define RTC_IRQF 0x80 /* any of the following 3 is active */
71 /**********************************************************************/
72 #define RTC_VALID RTC_REG_D
73 # define RTC_VRT 0x80 /* valid RAM and time */
74 /**********************************************************************/
76 static inline unsigned char cmos_read(unsigned char addr)
83 outb(addr, RTC_BASE_PORT + offs + 0);
84 return inb(RTC_BASE_PORT + offs + 1);
87 static inline void cmos_write(unsigned char val, unsigned char addr)
94 outb(addr, RTC_BASE_PORT + offs + 0);
95 outb(val, RTC_BASE_PORT + offs + 1);
98 #if CONFIG_HAVE_OPTION_TABLE
99 static int rtc_checksum_valid(int range_start, int range_end, int cks_loc)
102 unsigned sum, old_sum;
104 for(i = range_start; i <= range_end; i++) {
107 sum = (~sum)&0x0ffff;
108 old_sum = ((cmos_read(cks_loc)<<8) | cmos_read(cks_loc+1))&0x0ffff;
109 return sum == old_sum;
112 static void rtc_set_checksum(int range_start, int range_end, int cks_loc)
117 for(i = range_start; i <= range_end; i++) {
120 sum = ~(sum & 0x0ffff);
121 cmos_write(((sum >> 8) & 0x0ff), cks_loc);
122 cmos_write(((sum >> 0) & 0x0ff), cks_loc+1);
127 #define RTC_CONTROL_DEFAULT (RTC_24H)
128 #define RTC_FREQ_SELECT_DEFAULT (RTC_REF_CLCK_32KHZ | RTC_RATE_1024HZ)
130 #if CONFIG_ARCH_ALPHA
131 #define RTC_CONTROL_DEFAULT (RTC_SQWE | RTC_24H)
132 #define RTC_FREQ_SELECT_DEFAULT (RTC_REF_CLCK_32KHZ | RTC_RATE_1024HZ)
136 void rtc_init(int invalid)
138 #if CONFIG_HAVE_OPTION_TABLE
140 int cmos_invalid, checksum_invalid;
143 printk(BIOS_DEBUG, "RTC Init\n");
145 #if CONFIG_HAVE_OPTION_TABLE
146 /* See if there has been a CMOS power problem. */
147 x = cmos_read(RTC_VALID);
148 cmos_invalid = !(x & RTC_VRT);
150 /* See if there is a CMOS checksum error */
151 checksum_invalid = !rtc_checksum_valid(PC_CKS_RANGE_START,
152 PC_CKS_RANGE_END,PC_CKS_LOC);
154 if (invalid || cmos_invalid || checksum_invalid) {
155 printk(BIOS_WARNING, "RTC:%s%s%s zeroing cmos\n",
156 invalid?" Clear requested":"",
157 cmos_invalid?" Power Problem":"",
158 checksum_invalid?" Checksum invalid":"");
163 for(i = 10; i < 48; i++) {
168 /* Now setup a default date of Sat 1 January 2000 */
169 cmos_write(0, 0x00); /* seconds */
170 cmos_write(0, 0x02); /* minutes */
171 cmos_write(1, 0x04); /* hours */
172 cmos_write(7, 0x06); /* day of week */
173 cmos_write(1, 0x07); /* day of month */
174 cmos_write(1, 0x08); /* month */
175 cmos_write(0, 0x09); /* year */
181 /* Setup the real time clock */
182 cmos_write(RTC_CONTROL_DEFAULT, RTC_CONTROL);
183 /* Setup the frequency it operates at */
184 cmos_write(RTC_FREQ_SELECT_DEFAULT, RTC_FREQ_SELECT);
186 #if CONFIG_HAVE_OPTION_TABLE
187 /* See if there is a LB CMOS checksum error */
188 checksum_invalid = !rtc_checksum_valid(LB_CKS_RANGE_START,
189 LB_CKS_RANGE_END,LB_CKS_LOC);
191 printk(BIOS_DEBUG, "Invalid CMOS LB checksum\n");
193 /* Make certain we have a valid checksum */
194 rtc_set_checksum(PC_CKS_RANGE_START,
195 PC_CKS_RANGE_END,PC_CKS_LOC);
198 /* Clear any pending interrupts */
199 (void) cmos_read(RTC_INTR_FLAGS);
203 #if CONFIG_USE_OPTION_TABLE == 1
204 /* This routine returns the value of the requested bits
205 input bit = bit count from the beginning of the cmos image
206 length = number of bits to include in the value
207 ret = a character pointer to where the value is to be returned
208 output the value placed in ret
209 returns 0 = successful, -1 = an error occurred
211 static int get_cmos_value(unsigned long bit, unsigned long length, void *vret)
214 unsigned long byte,byte_bit;
218 /* The table is checked when it is built to ensure all
221 byte=bit/8; /* find the byte where the data starts */
222 byte_bit=bit%8; /* find the bit in the byte where the data starts */
223 if(length<9) { /* one byte or less */
224 uchar = cmos_read(byte); /* load the byte */
225 uchar >>= byte_bit; /* shift the bits to byte align */
226 /* clear unspecified bits */
227 ret[0] = uchar & ((1 << length) -1);
229 else { /* more that one byte so transfer the whole bytes */
230 for(i=0;length;i++,length-=8,byte++) {
232 ret[i]=cmos_read(byte);
238 int get_option(void *dest, const char *name)
240 extern struct cmos_option_table option_table;
241 struct cmos_option_table *ct;
242 struct cmos_entries *ce;
246 /* Figure out how long name is */
247 namelen = strnlen(name, CMOS_MAX_NAME_LENGTH);
249 /* find the requested entry record */
251 ce=(struct cmos_entries*)((unsigned char *)ct + ct->header_length);
252 for(;ce->tag==LB_TAG_OPTION;
253 ce=(struct cmos_entries*)((unsigned char *)ce + ce->size)) {
254 if (memcmp(ce->name, name, namelen) == 0) {
260 printk(BIOS_DEBUG, "WARNING: No cmos option '%s'\n", name);
264 if(get_cmos_value(ce->bit, ce->length, dest))
266 if(!rtc_checksum_valid(LB_CKS_RANGE_START,
267 LB_CKS_RANGE_END,LB_CKS_LOC))
271 #endif /* CONFIG_USE_OPTION_TABLE */