2 * This file is part of the coreboot project.
4 * Copyright (C) 2007-2008 coresystems GmbH
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
23 * sample the strobes signal
25 static u32 sample_strobes(int channel_offset, struct sys_info *sysinfo)
30 MCHBAR32(C0DRC1 + channel_offset) |= (1 << 6);
32 MCHBAR32(C0DRC1 + channel_offset) &= ~(1 << 6);
36 if (channel_offset != 0) { /* must be dual channel */
37 if (sysinfo->interleaved == 1) {
40 addr = ((u32)MCHBAR8(C0DRB3)) << 25;
44 for (i = 0; i < 28; i++) {
49 reg32 = MCHBAR32(RCVENMT);
50 if (channel_offset == 0) {
55 * [19] = 1: all bits are high
56 * [18] = 1: all bits are low
57 * [19:18] = 00: bits are mixed high, low
63 * This function sets receive enable coarse and medium timing parameters
66 static void set_receive_enable(int channel_offset, u8 medium, u8 coarse)
70 printk(BIOS_SPEW, " set_receive_enable() medium=0x%x, coarse=0x%x\n", medium, coarse);
72 reg32 = MCHBAR32(C0DRT1 + channel_offset);
74 reg32 |= ((u32)coarse & 0x0f) << 24;
75 MCHBAR32(C0DRT1 + channel_offset) = reg32;
77 /* This should never happen: */
79 printk(BIOS_DEBUG, "set_receive_enable: coarse overflow: 0x%02x.\n", coarse);
89 reg32 = MCHBAR32(RCVENMT);
90 if (!channel_offset) {
99 MCHBAR32(RCVENMT) = reg32;
103 static int normalize(int channel_offset, u8 * mediumcoarse, u8 * fine)
105 printk(BIOS_SPEW, " normalize()\n");
113 if (*mediumcoarse >= 0x40) {
114 printk(BIOS_DEBUG, "Normalize Error\n");
118 set_receive_enable(channel_offset, *mediumcoarse & 3,
121 MCHBAR8(C0WL0REOST + channel_offset) = *fine;
126 static int find_preamble(int channel_offset, u8 * mediumcoarse,
127 struct sys_info *sysinfo)
129 /* find start of the data phase */
132 printk(BIOS_SPEW, " find_preamble()\n");
135 if (*mediumcoarse < 4) {
136 printk(BIOS_DEBUG, "No Preamble found.\n");
141 set_receive_enable(channel_offset, *mediumcoarse & 3,
144 reg32 = sample_strobes(channel_offset, sysinfo);
146 } while (reg32 & (1 << 19));
148 if (!(reg32 & (1 << 18))) {
149 printk(BIOS_DEBUG, "No Preamble found (neither high nor low).\n");
157 * add a quarter clock to the current receive enable settings
160 static int add_quarter_clock(int channel_offset, u8 * mediumcoarse, u8 * fine)
162 printk(BIOS_SPEW, " add_quarter_clock() mediumcoarse=%02x fine=%02x\n",
163 *mediumcoarse, *fine);
168 if (*mediumcoarse >= 0x40) {
169 printk(BIOS_DEBUG, "clocks at max.\n");
173 set_receive_enable(channel_offset, *mediumcoarse & 3,
179 MCHBAR8(C0WL0REOST + channel_offset) = *fine;
184 static int find_strobes_low(int channel_offset, u8 * mediumcoarse, u8 * fine,
185 struct sys_info *sysinfo)
189 printk(BIOS_SPEW, " find_strobes_low()\n");
192 MCHBAR8(C0WL0REOST + channel_offset) = *fine;
194 set_receive_enable(channel_offset, *mediumcoarse & 3,
197 rcvenmt = sample_strobes(channel_offset, sysinfo);
199 if (((rcvenmt & (1 << 18)) != 0))
207 if (*mediumcoarse < 0xfe)
214 printk(BIOS_DEBUG, "Could not find low strobe\n");
218 static int find_strobes_edge(int channel_offset, u8 * mediumcoarse, u8 * fine,
219 struct sys_info *sysinfo)
225 printk(BIOS_SPEW, " find_strobes_edge()\n");
228 set_receive_enable(channel_offset, *mediumcoarse & 3,
232 MCHBAR8(C0WL0REOST + channel_offset) = *fine;
233 rcvenmt = sample_strobes(channel_offset, sysinfo);
235 if ((rcvenmt & (1 << 19)) == 0) {
245 if (*fine & (1 << 3)) {
254 if (*mediumcoarse <= 0x40) {
255 set_receive_enable(channel_offset, *mediumcoarse & 3,
260 printk(BIOS_DEBUG, "Could not find rising edge.\n");
267 set_receive_enable(channel_offset, *mediumcoarse & 3,
272 MCHBAR8(C0WL0REOST + channel_offset) = *fine;
278 * Here we use a trick. The RCVEN channel 0 registers are all at an
279 * offset of 0x80 to the channel 0 registers. We don't want to waste
280 * a lot of if()s so let's just pass 0 or 0x80 for the channel offset.
283 static int receive_enable_autoconfig(int channel_offset,
284 struct sys_info *sysinfo)
289 printk(BIOS_SPEW, "receive_enable_autoconfig() for channel %d\n",
290 channel_offset ? 1 : 0);
292 /* Set initial values */
293 mediumcoarse = (sysinfo->cas << 2) | 3;
296 if (find_strobes_low(channel_offset, &mediumcoarse, &fine, sysinfo))
299 if (find_strobes_edge(channel_offset, &mediumcoarse, &fine, sysinfo))
302 if (add_quarter_clock(channel_offset, &mediumcoarse, &fine))
305 if (find_preamble(channel_offset, &mediumcoarse, sysinfo))
308 if (add_quarter_clock(channel_offset, &mediumcoarse, &fine))
311 if (normalize(channel_offset, &mediumcoarse, &fine))
314 /* This is a debug check to see if the rcven code is fully working.
315 * It can be removed when the output message is not printed anymore
317 if (MCHBAR8(C0WL0REOST + channel_offset) == 0) {
318 printk(BIOS_DEBUG, "Weird. No C%sWL0REOST\n", channel_offset?"1":"0");
324 void receive_enable_adjust(struct sys_info *sysinfo)
326 /* Is channel 0 populated? */
327 if (sysinfo->dimm[0] != SYSINFO_DIMM_NOT_POPULATED
328 || sysinfo->dimm[1] != SYSINFO_DIMM_NOT_POPULATED)
329 if (receive_enable_autoconfig(0, sysinfo))
332 /* Is channel 1 populated? */
333 if (sysinfo->dimm[2] != SYSINFO_DIMM_NOT_POPULATED
334 || sysinfo->dimm[3] != SYSINFO_DIMM_NOT_POPULATED)
335 if (receive_enable_autoconfig(0x80, sysinfo))