src/northbridge/intel/i945/gma.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2008-2009 coresystems GmbH
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; version 2 of the License.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  18  */
  19
  20 #include <console/console.h>
  21 #include <device/device.h>
  22 #include <device/pci.h>
  23 #include <device/pci_ids.h>
  24 #include <pc80/mc146818rtc.h>
  25
  26 static void gma_func0_init(struct device *dev)
  27 {
  28         u32 reg32;
  29
  30         /* IGD needs to be Bus Master */
  31         reg32 = pci_read_config32(dev, PCI_COMMAND);
  32         pci_write_config32(dev, PCI_COMMAND, reg32 | PCI_COMMAND_MASTER);
  33
  34         pci_dev_init(dev);
  35 }
  36
  37 static void gma_func1_init(struct device *dev)
  38 {
  39         u32 reg32;
  40         u8 val;
  41
  42         /* IGD needs to be Bus Master, also enable IO accesss */
  43         reg32 = pci_read_config32(dev, PCI_COMMAND);
  44         pci_write_config32(dev, PCI_COMMAND, reg32 |
  45                         PCI_COMMAND_MASTER | PCI_COMMAND_IO);
  46
  47         if (!get_option(&val, "tft_brightness"))
  48                 pci_write_config8(dev, 0xf4, val);
  49         else
  50                 pci_write_config8(dev, 0xf4, 0xff);
  51 }
  52
  53 static void gma_set_subsystem(device_t dev, unsigned vendor, unsigned device)
  54 {
  55         if (!vendor || !device) {
  56                 pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
  57                                 pci_read_config32(dev, PCI_VENDOR_ID));
  58         } else {
  59                 pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
  60                                 ((device & 0xffff) << 16) | (vendor & 0xffff));
  61         }
  62 }
  63
  64 static struct pci_operations gma_pci_ops = {
  65         .set_subsystem    = gma_set_subsystem,
  66 };
  67
  68 static struct device_operations gma_func0_ops = {
  69         .read_resources         = pci_dev_read_resources,
  70         .set_resources          = pci_dev_set_resources,
  71         .enable_resources       = pci_dev_enable_resources,
  72         .init                   = gma_func0_init,
  73         .scan_bus               = 0,
  74         .enable                 = 0,
  75         .ops_pci                = &gma_pci_ops,
  76 };
  77
  78
  79 static struct device_operations gma_func1_ops = {
  80         .read_resources         = pci_dev_read_resources,
  81         .set_resources          = pci_dev_set_resources,
  82         .enable_resources       = pci_dev_enable_resources,
  83         .init                   = gma_func1_init,
  84         .scan_bus               = 0,
  85         .enable                 = 0,
  86         .ops_pci                = &gma_pci_ops,
  87 };
  88
  89 static const struct pci_driver i945_gma_func0_driver __pci_driver = {
  90         .ops    = &gma_func0_ops,
  91         .vendor = PCI_VENDOR_ID_INTEL,
  92         .device = 0x27a2,
  93 };
  94
  95 static const struct pci_driver i945_gma_func1_driver __pci_driver = {
  96         .ops    = &gma_func1_ops,
  97         .vendor = PCI_VENDOR_ID_INTEL,
  98         .device = 0x27a6,
  99 };
 100