2 * This file is part of the coreboot project.
4 * Copyright (C) 2007 Corey Osgood <corey@slightlyhackish.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 #ifndef NORTHBRIDGE_INTEL_I82810_RAMINIT_H
22 #define NORTHBRIDGE_INTEL_I82810_RAMINIT_H
24 /* The 82810 supports max. 2 dual-sided DIMMs. */
25 #define DIMM_SOCKETS 2
27 struct mem_controller {
29 uint16_t channel0[DIMM_SOCKETS];
32 /* The following table has been bumped over to this header to avoid clutter in
33 * raminit.c. It's used to translate the value read from SPD Byte 31 to a value
34 * the northbridge can understand in DRP, aka Rx52[7:4], [3:0]. Where most
35 * northbridges have some sort of simple calculation that can be done for this,
36 * I haven't yet figured out one for this northbridge. Until someone does,
37 * this table is necessary.
40 /* TODO: Find a better way of doing this. */
42 static const uint8_t translate_spd_to_i82810[] = {
43 /* Note: 4MB sizes are not supported, so dual-sided DIMMs with a 4MB
44 * side can't be either, at least for now.
46 /* TODO: For above case, only use the other side if > 4MB, and get some
47 * of these DIMMs to test it with. Same for unsupported 128/x sizes.
50 /* SPD Byte 31 Memory Size [Side 1/2] */
51 0xff, /* 0x01 No memory */
55 0x04, /* 0x04 16/0 or 16 */
58 0xff, /* 0x07 Invalid */
59 0x07, /* 0x08 32/0 or 32 */
62 0xff, /* 0x0B Invalid */
63 0x08, /* 0x0C 32/16 */
64 0xff, 0xff, 0xff, /* 0x0D-0F Invalid */
65 0x0a, /* 0x10 64/0 or 64 */
68 0xff, /* 0x13 Invalid */
69 0xff, /* 0x14 64/16 */
70 0xff, 0xff, 0xff, /* 0x15-17 Invalid */
71 0x0b, /* 0x18 64/32 */
72 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 0x19-1f Invalid */
73 0x0d, /* 0x20 128/0 or 128 */
74 /* These configurations are not supported by the i810 */
75 0xff, /* 0x21 128/4 */
76 0xff, /* 0x22 128/8 */
77 0xff, /* 0x23 Invalid */
78 0xff, /* 0x24 128/16 */
79 0xff, 0xff, 0xff, /* 0x25-27 Invalid */
80 0xff, /* 0x28 128/32 */
81 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 0x29-2f Invalid */
82 0x0e, /* 0x30 128/64 */
83 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
84 0xff, 0xff, 0xff, /* 0x31-3f Invalid */
85 0x0f, /* 0x40 256/0 or 256 */
86 /* Anything larger is not supported by the 82810. */
89 #endif /* NORTHBRIDGE_INTEL_I82810_RAMINIT_H */