projects
/
coreboot.git
/ blob
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
|
commitdiff
|
tree
history
|
raw
|
HEAD
Add support for Intel Sandybridge CPU (northbridge part)
[coreboot.git]
/
src
/
northbridge
/
intel
/
e7520
/
raminit.h
1
#ifndef RAMINIT_H
2
#define RAMINIT_H
3
4
#define DIMM_SOCKETS 4
5
struct mem_controller {
6
unsigned node_id;
7
// device_t f0, f1, f2, f3;
8
u16 channel0[DIMM_SOCKETS];
9
u16 channel1[DIMM_SOCKETS];
10
};
11
12
#endif /* RAMINIT_H */