51aaa220492f96324ffa7b8fea3ae8550fbbe71a
[coreboot.git] / src / northbridge / ibm / cpc710 / cpc710_pci.h
1 /*
2  * (C) Copyright 2002
3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4  *
5  * See file CREDITS for list of people who contributed to this
6  * project.
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License as
10  * published by the Free Software Foundation; either version 2 of
11  * the License, or (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software
20  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
21  * MA 02110-1301 USA
22  */
23
24 #ifndef _CPC710_PCI_H_
25 #define _CPC710_PCI_H_
26
27 #define CPC710_PCI32_CONFIG             (PCIC0_CFGADDR & 0xfff00000)
28 #define CPC710_PCI32_MEM_SIZE           0xf8000000
29 #define CPC710_PCI32_MEM_BASE           0xc0000000
30 #define CPC710_PCI32_IO_SIZE            0xf8000000
31 #define CPC710_PCI32_IO_BASE            0x80000000
32
33 //#define CPC710_PCI64_CONFIG           0xff400000
34 //#define CPC710_PCI64_MEM_SIZE         0xf8000000
35 //#define CPC710_PCI64_MEM_BASE         0xc8000000
36 //#define CPC710_PCI64_IO_SIZE          0xf8000000
37 //#define CPC710_PCI64_IO_BASE          0x88000000
38
39 #define CPC710_PCIL0_PSEA               0xf6110
40 #define CPC710_PCIL0_PCIDG              0xf6120
41 #define CPC710_PCIL0_INTACK             0xf7700
42 #define CPC710_PCIL0_PIBAR              0xf7800
43 #define CPC710_PCIL0_PMBAR              0xf7810
44 #define CPC710_PCIL0_CRR                0xf7ef0
45 #define CPC710_PCIL0_PR                 0xf7f20
46 #define CPC710_PCIL0_ACR                0xf7f30
47 #define CPC710_PCIL0_MSIZE              0xf7f40
48 #define CPC710_PCIL0_IOSIZE             0xf7f60
49 #define CPC710_PCIL0_SMBAR              0xf7f80
50 #define CPC710_PCIL0_SIBAR              0xf7fc0
51 #define CPC710_PCIL0_CTLRW              0xf7fd0
52 #define CPC710_PCIL0_CFGADDR            0xf8000 /* little endian */
53 #define CPC710_PCIL0_CFGDATA            0xf8010 /* little endian */
54 #define CPC710_PCIL0_PSSIZE             0xf8100
55 #define CPC710_PCIL0_BARPS              0xf8120
56 #define CPC710_PCIL0_PSBAR              0xf8140
57 #define CPC710_PCIL0_BPMDLK             0xf8200
58 #define CPC710_PCIL0_TPMDLK             0xf8210
59 #define CPC710_PCIL0_BIODLK             0xf8220
60 #define CPC710_PCIL0_TIODLK             0xf8230
61 #define CPC710_PCIL0_INTSET             0xf8310
62
63
64 #endif