Fix some settings fo AMD MCT. It is based on BIOS test suite.
[coreboot.git] / src / northbridge / amd / amdmct / mct_ddr3 / modtrd.c
1 /*
2  * This file is part of the coreboot project.
3  *
4  * Copyright (C) 2010 Advanced Micro Devices, Inc.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; version 2 of the License.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software
17  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
18  */
19
20 static u32 mct_MR1Odt_RDimm(struct MCTStatStruc *pMCTstat,
21                                 struct DCTStatStruc *pDCTstat, u8 dct, u32 MrsChipSel)
22 {
23         u8 Speed = pDCTstat->Speed;
24         u32 ret;
25         u8 DimmsInstalled, DimmNum, ChipSelect;
26
27         ChipSelect = (MrsChipSel >> 20) & 0xF;
28         DimmNum = ChipSelect & 0xFE;
29         DimmsInstalled = pDCTstat->MAdimms[dct];
30         if (dct == 1)
31                 DimmNum ++;
32         ret = 0;
33
34         if (mctGet_NVbits(NV_MAX_DIMMS) == 4) {
35                 if (DimmsInstalled == 1)
36                         ret |= 1 << 2;
37                 else {
38                         if (pDCTstat->CSPresent & 0xF0) {
39                                 if (pDCTstat->DimmQRPresent & (1 << DimmNum)) {
40                                         if (!(ChipSelect & 1))
41                                                 ret |= 1 << 2;
42                                 } else
43                                         ret |= 0x204;
44                         } else {
45                                 if (Speed < 6)
46                                         ret |= 0x44;
47                                 else
48                                         ret |= 0x204;
49                         }
50                 }
51         } else if (DimmsInstalled == 1)
52                 ret |= 1 << 2;
53         else if (Speed < 6)
54                 ret |= 0x44;
55         else
56                 ret |= 0x204;
57
58         //ret = 0;
59         return ret;
60 }
61
62 static u32 mct_DramTermDyn_RDimm(struct MCTStatStruc *pMCTstat,
63                                 struct DCTStatStruc *pDCTstat, u8 dimm)
64 {
65         u8 DimmsInstalled = dimm;
66         u32 DramTermDyn = 0;
67         u8 Speed = pDCTstat->Speed;
68
69         if (mctGet_NVbits(NV_MAX_DIMMS) == 4) {
70                 if (pDCTstat->CSPresent & 0xF0) {
71                         if (DimmsInstalled == 1)
72                                 if (Speed == 7)
73                                         DramTermDyn |= 1 << 10;
74                                 else
75                                         DramTermDyn |= 1 << 11;
76                         else
77                                 if (Speed == 4)
78                                         DramTermDyn |= 1 << 11;
79                                 else
80                                         DramTermDyn |= 1 << 10;
81                 } else {
82                         if (DimmsInstalled != 1) {
83                                 if (Speed == 7)
84                                         DramTermDyn |= 1 << 10;
85                                 else
86                                         DramTermDyn |= 1 << 11;
87                         }
88                 }
89         } else {
90                 if (DimmsInstalled != 1)
91                         DramTermDyn |= 1 << 11;
92         }
93         return DramTermDyn;
94 }