- O2, enums, and switch statements work in romcc
[coreboot.git] / src / northbridge / amd / amdk8 / misc_control.c
1 /* Turn off machine check triggers when reading
2  * pci space where there are no devices.
3  * This is necessary when scaning the bus for
4  * devices which is done by the kernel */
5
6 #include <console/console.h>
7 #include <device/device.h>
8 #include <device/pci.h>
9 #include <device/pci_ids.h>
10 #include <device/pci_ops.h>
11 #include "./cpu_rev.c"
12
13 static void misc_control_init(struct device *dev)
14 {
15         uint32_t cmd;
16         
17         printk_debug("NB: Function 3 Misc Control.. ");
18         cmd = pci_read_config32(dev, 0x44);
19         cmd |= (1<<6) | (1<<25);
20         pci_write_config32(dev, 0x44, cmd );
21         if (is_cpu_pre_c0()) {
22                 /* errata 58 */
23                 cmd = pci_read_config32(dev, 0x80);
24                 cmd &= ~(1<<0);
25                 pci_write_config32(dev, 0x80, cmd );
26                 cmd = pci_read_config32(dev, 0x84);
27                 cmd &= ~(1<<24);
28                 cmd &= ~(1<<8);
29                 pci_write_config32(dev, 0x84, cmd );
30                 /* errata 66 */
31                 cmd = pci_read_config32(dev, 0x70);
32                 cmd &= ~(1<<0);
33                 cmd |= (1<<1);
34                 pci_write_config32(dev, 0x70, cmd );
35                 cmd = pci_read_config32(dev, 0x7c);
36                 cmd &= ~(3<<4);
37                 pci_write_config32(dev, 0x7c, cmd );
38         }
39         else {
40                 /* errata 98 */
41 #if 0           
42                 cmd = pci_read_config32(dev, 0xd4);
43                 if(cmd != 0x04e20707) {
44                         cmd = 0x04e20707;
45                         pci_write_config32(dev, 0xd4, cmd );
46                         hard_reset();
47                 }
48 #endif
49
50                 cmd = 0x04e20707;
51                 pci_write_config32(dev, 0xd4, cmd );
52         }
53 #if 1   
54         cmd = pci_read_config32(dev, 0xdc);
55         if((cmd & 0x0000ff00) != 0x02500) {
56                 cmd &= 0xffff00ff;
57                 cmd |= 0x00002500;
58                 pci_write_config32(dev, 0xdc, cmd );
59                 printk_debug("resetting cpu\n");
60                 hard_reset();
61         }
62 #endif  
63         printk_debug("done.\n");
64 }
65
66 static struct device_operations mcf3_ops  = {
67         .read_resources   = pci_dev_read_resources,
68         .set_resources    = pci_dev_set_resources,
69         .enable_resources = pci_dev_enable_resources,
70         .init             = misc_control_init,
71         .scan_bus         = 0,
72 };
73
74 static struct pci_driver mcf3_driver __pci_driver = {
75         .ops    = &mcf3_ops,
76         .vendor = PCI_VENDOR_ID_AMD,
77         .device = 0x1103,
78 };
79