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32 // 2005.9 serengeti support
34 // 2005.9 yhlu modify that to more dynamic for AMD Opteron Based MB
36 #include <console/console.h>
37 #include <device/pci.h>
38 #include <device/pci_ids.h>
42 #include <cpu/amd/amdk8_sysconf.h>
46 unsigned node_link_to_bus(unsigned node, unsigned link)
51 dev = dev_find_slot(0, PCI_DEVFN(0x18, 1));
55 for(reg = 0xE0; reg < 0xF0; reg += 0x04) {
60 config_map = pci_read_config32(dev, reg);
61 if ((config_map & 3) != 3) {
64 dst_node = (config_map >> 4) & 7;
65 dst_link = (config_map >> 8) & 3;
66 bus_base = (config_map >> 16) & 0xff;
68 printk_debug("node.link=bus: %d.%d=%d 0x%2x->0x%08x\n",
69 dst_node, dst_link, bus_base,
72 if ((dst_node == node) && (dst_link == link))
82 /* why we need pci1234 array
83 final result for pci1234 will be
84 pci1234[0] will record sblink and bus range
85 pci1234[i] will record ht chain i.
86 it will keep the sequence when some ht io card is not installed.
88 for Tyan S2885 the linxbios_ram will put 8151 chain (link 0) to 0xE0 reg, and 8131/8111 on 0xe4 reg, So we need to make sure the sb link
89 will always on pci1234[0]
90 for multi ht-io cards, if you don't install htio1, and only installed htio2, htio3, the htio will be on 0xe4, and 0xe8.
91 but we want to leave pci1234[1] to htio1 (even it is disabled) , and let htio2 and htio3 still use pci1234[2] and pci1234[3]
92 So we keep the sequence. ---- you need to preset the pci1234[1], pci1234[2], pci1234[3] for this purpose
93 for example you need set
94 unsigned pci1234[] = {
96 0x0000f10, // HT IO 1 card always on node 1
97 0x0000f20, // HT IO 2 card always on node 2
98 0x0000f30 // HT IO 3 card always on node 3
101 for 2p+htio(n1)+htio(n0_1)+htio(n1_1),2p+htio(n1)+2p+htio(n2)+htio(n3) : need pci1234[6]
102 unsigned pci1234[] = {
104 0x0000010, // HT IO 1 card always on node 1
105 0x0000f00, // HT IO 2 card always on node 0
106 0x0000110, // HT IO 3 card always on node 1
107 0x0000f20, // HT IO 4 card always on node 2
108 0x0000f30 // HT IO 5 card always on node 3
111 for 4p+htio(n1)+htio(n2)+htio(n3),4p+htio(n1)+4p+htio(n6)+htio(n7) : need pci1234[6]
112 unsigned pci1234[] = {
114 0x0000f10, // HT IO 1 card always on node 1
115 0x0000f20, // HT IO 2 card always on node 2
116 0x0000f30, // HT IO 3 card always on node 3
117 0x0000f60, // HT IO 4 card always on node 6
118 0x0000f70 // HT IO 5 card always on node 7
122 for 2p+htio(n1)+htio(n0_1)+htio(n1_1), 2p+htio(n1)+2p+htio(n2)+htio(n3), 2p+htio(n1)+4p+htio(n4)+htio(n5), need pci1234[8]
123 unsigned pci1234[] = {
125 0x0000010, // HT IO 1 card always on node 1
126 0x0000f00, // HT IO 2 card always on node 0
127 0x0000110, // HT IO 3 card always on node 1
128 0x0000f20, // HT IO 4 card always on node 2
129 0x0000f30 // HT IO 5 card always on node 3
130 0x0000f40, // HT IO 6 card always on node 4
131 0x0000f50 // HT IO 7 card always on node 5
135 for 4p+htio(n1)+htio(n2)+htio(n3), 4p+htio(n1)+2p+htio(n4)+htio(n5), 4p+htio(n1)+4p+htio(n6)+htio(n7), need pci1234[8]
136 unsigned pci1234[] = {
138 0x0000f10, // HT IO 1 card always on node 1
139 0x0000f20, // HT IO 2 card always on node 2
140 0x0000f30, // HT IO 3 card always on node 3
141 0x0000f40, // HT IO 4 card always on node 4
142 0x0000f50 // HT IO 5 card always on node 5
143 0x0000f60, // HT IO 6 card always on node 6
144 0x0000f70 // HT IO 7 card always on node 7
148 So Max HC_POSSIBLE_NUM is 8
157 just put all the possible ht node/link to the list tp pci1234[] in get_bus_conf.c on MB dir
159 Also don't forget to increase the ACPI_SSDTX_NUM etc if you have too much SSDT
161 How about co-processor on socket 1 on 2 way system. or socket 2, and socket3 on 4 way system....? treat that as one hc too!
164 void get_sblk_pci1234(void)
171 /* read PCI_DEV(0,0x18,0) 0x64 bit [8:9] to find out SbLink m */
172 dev = dev_find_slot(0, PCI_DEVFN(0x18,0));
173 dword = pci_read_config32(dev, 0x64);
174 sysconf.sblk = (dword>>8) & 0x3;
178 sysconf.pci1234[0] = dword;
180 /*about hardcode numbering for HT_IO support
181 set the node_id and link_id that could have ht chain in the one array,
182 then check if is enabled.... then update final value
184 //here we need to set hcdn
185 //1. hypertransport.c need to record hcdn_reg together with 0xe0, 0xe4, 0xe8, 0xec when are set
186 //2. so at the same time we need update hsdn with hcdn_reg here
188 dev = dev_find_slot(0, PCI_DEVFN(0x18, 1));
191 dwordx = pci_read_config32(dev, 0xe0+j*4);
192 dwordx &=0xffff0ff1; //keep bus num, node_id, link_num, enable bits
193 if((dwordx & 0xff1) == dword) { //SBLINK
194 sysconf.pci1234[0] = dwordx;
195 sysconf.hcdn[0] = sysconf.hcdn_reg[j];
198 if((dwordx & 1) == 1) {
199 // We need to find out the number of HC
201 for(i=1;i<sysconf.hc_possible_num;i++) {
202 if((dwordx & 0xff0) == (sysconf.pci1234[i] & 0xff0)) {
203 sysconf.pci1234[i] = dwordx;
204 sysconf.hcdn[i] = sysconf.hcdn_reg[j];
208 // for 0xff0 match or same node
209 for(i=1;i<sysconf.hc_possible_num;i++) {
210 if((dwordx & 0xff0) == (dwordx & sysconf.pci1234[i] & 0xff0)) {
211 sysconf.pci1234[i] = dwordx;
212 sysconf.hcdn[i] = sysconf.hcdn_reg[j];
219 for(i=1;i<sysconf.hc_possible_num;i++) {
220 if((sysconf.pci1234[i] & 1) != 1) {
221 sysconf.pci1234[i] = 0;
222 sysconf.hcdn[i] = 0x20202020;