src/northbridge/amd/amdk8/debug.c

   1 /*
   2  * generic K8 debug code, used by mainboard specific romstage.c
   3  *
   4  */
   5
   6 #ifndef CACHE_AS_RAM_ADDRESS_DEBUG
   7 #define CACHE_AS_RAM_ADDRESS_DEBUG 0
   8 #endif
   9
  10 static inline void print_debug_addr(const char *str, void *val)
  11 {
  12 #if CACHE_AS_RAM_ADDRESS_DEBUG == 1
  13                 printk(BIOS_DEBUG, "------Address debug: %s%x------\n", str, val);
  14 #endif
  15 }
  16
  17 #if 1
  18 static void print_debug_pci_dev(unsigned dev)
  19 {
  20         printk(BIOS_DEBUG, "PCI: %02x:%02x.%02x", (dev>>20) & 0xff, (dev>>15) & 0x1f, (dev>>12) & 0x7);
  21 }
  22
  23 static void print_pci_devices(void)
  24 {
  25         device_t dev;
  26         for(dev = PCI_DEV(0, 0, 0);
  27                 dev <= PCI_DEV(0xff, 0x1f, 0x7);
  28                 dev += PCI_DEV(0,0,1)) {
  29                 uint32_t id;
  30                 id = pci_read_config32(dev, PCI_VENDOR_ID);
  31                 if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
  32                         (((id >> 16) & 0xffff) == 0xffff) ||
  33                         (((id >> 16) & 0xffff) == 0x0000)) {
  34                         continue;
  35                 }
  36                 print_debug_pci_dev(dev);
  37                 printk(BIOS_DEBUG, " %04x:%04x\n", (id & 0xffff), (id>>16));
  38                 if(((dev>>12) & 0x07) == 0) {
  39                         uint8_t hdr_type;
  40                         hdr_type = pci_read_config8(dev, PCI_HEADER_TYPE);
  41                         if((hdr_type & 0x80) != 0x80) {
  42                                 dev += PCI_DEV(0,0,7);
  43                         }
  44                 }
  45         }
  46 }
  47
  48 static void dump_pci_device(unsigned dev)
  49 {
  50         int i;
  51         print_debug_pci_dev(dev);
  52
  53         for(i = 0; i < 256; i++) {
  54                 unsigned char val;
  55                 if ((i & 0x0f) == 0) {
  56                         printk(BIOS_DEBUG, "\n%02x:",i);
  57                 }
  58                 val = pci_read_config8(dev, i);
  59                 printk(BIOS_DEBUG, " %02x", val);
  60         }
  61         print_debug("\n");
  62 }
  63
  64 #if CONFIG_K8_REV_F_SUPPORT == 1
  65 static uint32_t pci_read_config32_index_wait(device_t dev, uint32_t index_reg, uint32_t index);
  66 static void dump_pci_device_index_wait(unsigned dev, uint32_t index_reg)
  67 {
  68         int i;
  69         print_debug_pci_dev(dev);
  70         print_debug(" -- index_reg="); print_debug_hex32(index_reg);
  71
  72         for(i = 0; i < 0x40; i++) {
  73                 uint32_t val;
  74                 int j;
  75                 printk(BIOS_DEBUG, "\n%02x:",i);
  76                 val = pci_read_config32_index_wait(dev, index_reg, i);
  77                 for(j=0;j<4;j++) {
  78                         printk(BIOS_DEBUG, " %02x", val & 0xff);
  79                         val >>= 8;
  80                 }
  81
  82         }
  83         print_debug("\n");
  84 }
  85 #endif
  86
  87 static void dump_pci_devices(void)
  88 {
  89         device_t dev;
  90         for(dev = PCI_DEV(0, 0, 0);
  91                 dev <= PCI_DEV(0xff, 0x1f, 0x7);
  92                 dev += PCI_DEV(0,0,1)) {
  93                 uint32_t id;
  94                 id = pci_read_config32(dev, PCI_VENDOR_ID);
  95                 if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
  96                         (((id >> 16) & 0xffff) == 0xffff) ||
  97                         (((id >> 16) & 0xffff) == 0x0000)) {
  98                         continue;
  99                 }
 100                 dump_pci_device(dev);
 101
 102                 if(((dev>>12) & 0x07) == 0) {
 103                         uint8_t hdr_type;
 104                         hdr_type = pci_read_config8(dev, PCI_HEADER_TYPE);
 105                         if((hdr_type & 0x80) != 0x80) {
 106                                 dev += PCI_DEV(0,0,7);
 107                         }
 108                 }
 109         }
 110 }
 111
 112 static void dump_pci_devices_on_bus(unsigned busn)
 113 {
 114         device_t dev;
 115         for(dev = PCI_DEV(busn, 0, 0);
 116                 dev <= PCI_DEV(busn, 0x1f, 0x7);
 117                 dev += PCI_DEV(0,0,1)) {
 118                 uint32_t id;
 119                 id = pci_read_config32(dev, PCI_VENDOR_ID);
 120                 if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
 121                         (((id >> 16) & 0xffff) == 0xffff) ||
 122                         (((id >> 16) & 0xffff) == 0x0000)) {
 123                         continue;
 124                 }
 125                 dump_pci_device(dev);
 126
 127                 if(((dev>>12) & 0x07) == 0) {
 128                         uint8_t hdr_type;
 129                         hdr_type = pci_read_config8(dev, PCI_HEADER_TYPE);
 130                         if((hdr_type & 0x80) != 0x80) {
 131                                 dev += PCI_DEV(0,0,7);
 132                         }
 133                 }
 134         }
 135 }
 136
 137 #if CONFIG_DEBUG_SMBUS
 138
 139 static void dump_spd_registers(const struct mem_controller *ctrl)
 140 {
 141         int i;
 142         print_debug("\n");
 143         for(i = 0; i < 4; i++) {
 144                 unsigned device;
 145                 device = ctrl->channel0[i];
 146                 if (device) {
 147                         int j;
 148                         printk(BIOS_DEBUG, "dimm: %02x.0: %02x", i, device);
 149                         for(j = 0; j < 128; j++) {
 150                                 int status;
 151                                 unsigned char byte;
 152                                 if ((j & 0xf) == 0) {
 153                                         printk(BIOS_DEBUG, "\n%02x: ", j);
 154                                 }
 155                                 status = smbus_read_byte(device, j);
 156                                 if (status < 0) {
 157                                         break;
 158                                 }
 159                                 byte = status & 0xff;
 160                                 printk(BIOS_DEBUG, "%02x ", byte);
 161                         }
 162                         print_debug("\n");
 163                 }
 164                 device = ctrl->channel1[i];
 165                 if (device) {
 166                         int j;
 167                         printk(BIOS_DEBUG, "dimm: %02x.1: %02x", i, device);
 168                         for(j = 0; j < 128; j++) {
 169                                 int status;
 170                                 unsigned char byte;
 171                                 if ((j & 0xf) == 0) {
 172                                         printk(BIOS_DEBUG, "\n%02x: ", j);
 173                                 }
 174                                 status = smbus_read_byte(device, j);
 175                                 if (status < 0) {
 176                                         break;
 177                                 }
 178                                 byte = status & 0xff;
 179                                 printk(BIOS_DEBUG, "%02x ", byte);
 180                         }
 181                         print_debug("\n");
 182                 }
 183         }
 184 }
 185 static void dump_smbus_registers(void)
 186 {
 187         unsigned device;
 188         print_debug("\n");
 189         for(device = 1; device < 0x80; device++) {
 190                 int j;
 191                 if( smbus_read_byte(device, 0) < 0 ) continue;
 192                 printk(BIOS_DEBUG, "smbus: %02x", device);
 193                 for(j = 0; j < 256; j++) {
 194                         int status;
 195                         unsigned char byte;
 196                         status = smbus_read_byte(device, j);
 197                         if (status < 0) {
 198                                 break;
 199                         }
 200                         if ((j & 0xf) == 0) {
 201                                 printk(BIOS_DEBUG, "\n%02x: ",j);
 202                         }
 203                         byte = status & 0xff;
 204                         printk(BIOS_DEBUG, "%02x ", byte);
 205                 }
 206                 print_debug("\n");
 207         }
 208 }
 209 #endif
 210
 211 static void dump_io_resources(unsigned port)
 212 {
 213
 214         int i;
 215         udelay(2000);
 216         printk(BIOS_DEBUG, "%04x:\n", port);
 217         for(i=0;i<256;i++) {
 218                 uint8_t val;
 219                 if ((i & 0x0f) == 0) {
 220                         printk(BIOS_DEBUG, "%02x:", i);
 221                 }
 222                 val = inb(port);
 223                 printk(BIOS_DEBUG, " %02x",val);
 224                 if ((i & 0x0f) == 0x0f) {
 225                         print_debug("\n");
 226                 }
 227                 port++;
 228         }
 229 }
 230
 231 static void dump_mem(unsigned start, unsigned end)
 232 {
 233         unsigned i;
 234         print_debug("dump_mem:");
 235         for(i=start;i<end;i++) {
 236                 if((i & 0xf)==0) {
 237                         printk(BIOS_DEBUG, "\n%08x:", i);
 238                 }
 239                 printk(BIOS_DEBUG, " %02x", (unsigned char)*((unsigned char *)i));
 240         }
 241         print_debug("\n");
 242  }
 243 #endif