f9e9671a3e9004102c99f7324d52dd6e125e54ce
[coreboot.git] / src / northbridge / amd / amdk8 / debug.c
1 /*
2  * generic K8 debug code, used by mainboard specific romstage.c
3  *
4  */
5
6 #ifndef CACHE_AS_RAM_ADDRESS_DEBUG
7 #define CACHE_AS_RAM_ADDRESS_DEBUG 0
8 #endif
9
10 static inline void print_debug_addr(const char *str, void *val)
11 {
12 #if CACHE_AS_RAM_ADDRESS_DEBUG == 1
13                 printk_debug("------Address debug: %s%x------\n", str, val);
14 #endif
15 }
16
17 #if 1
18 static void print_debug_pci_dev(unsigned dev)
19 {
20         printk_debug("PCI: %02x:%02x.%02x", (dev>>20) & 0xff, (dev>>15) & 0x1f, (dev>>12) & 0x7);
21 }
22
23 static void print_pci_devices(void)
24 {
25         device_t dev;
26         for(dev = PCI_DEV(0, 0, 0);
27                 dev <= PCI_DEV(0xff, 0x1f, 0x7);
28                 dev += PCI_DEV(0,0,1)) {
29                 uint32_t id;
30                 id = pci_read_config32(dev, PCI_VENDOR_ID);
31                 if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
32                         (((id >> 16) & 0xffff) == 0xffff) ||
33                         (((id >> 16) & 0xffff) == 0x0000)) {
34                         continue;
35                 }
36                 print_debug_pci_dev(dev);
37                 printk_debug(" %04x:%04x\n", (id & 0xffff), (id>>16));
38                 if(((dev>>12) & 0x07) == 0) {
39                         uint8_t hdr_type;
40                         hdr_type = pci_read_config8(dev, PCI_HEADER_TYPE);
41                         if((hdr_type & 0x80) != 0x80) {
42                                 dev += PCI_DEV(0,0,7);
43                         }
44                 }
45         }
46 }
47
48 static void dump_pci_device(unsigned dev)
49 {
50         int i;
51         print_debug_pci_dev(dev);
52
53         for(i = 0; i < 256; i++) {
54                 unsigned char val;
55                 if ((i & 0x0f) == 0) {
56                         printk_debug("\n%02x:",i);
57                 }
58                 val = pci_read_config8(dev, i);
59                 printk_debug(" %02x", val);
60         }
61         print_debug("\n");
62 }
63
64 #if CONFIG_K8_REV_F_SUPPORT == 1
65 static uint32_t pci_read_config32_index_wait(device_t dev, uint32_t index_reg, uint32_t index);
66 static void dump_pci_device_index_wait(unsigned dev, uint32_t index_reg)
67 {
68         int i;
69         print_debug_pci_dev(dev);
70         print_debug(" -- index_reg="); print_debug_hex32(index_reg);
71
72         for(i = 0; i < 0x40; i++) {
73                 uint32_t val;
74                 int j;
75                 printk_debug("\n%02x:",i);
76                 val = pci_read_config32_index_wait(dev, index_reg, i);
77                 for(j=0;j<4;j++) {
78                         printk_debug(" %02x", val & 0xff);
79                         val >>= 8;
80                 }
81
82         }
83         print_debug("\n");
84 }
85 #endif
86
87 static void dump_pci_devices(void)
88 {
89         device_t dev;
90         for(dev = PCI_DEV(0, 0, 0);
91                 dev <= PCI_DEV(0xff, 0x1f, 0x7);
92                 dev += PCI_DEV(0,0,1)) {
93                 uint32_t id;
94                 id = pci_read_config32(dev, PCI_VENDOR_ID);
95                 if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
96                         (((id >> 16) & 0xffff) == 0xffff) ||
97                         (((id >> 16) & 0xffff) == 0x0000)) {
98                         continue;
99                 }
100                 dump_pci_device(dev);
101
102                 if(((dev>>12) & 0x07) == 0) {
103                         uint8_t hdr_type;
104                         hdr_type = pci_read_config8(dev, PCI_HEADER_TYPE);
105                         if((hdr_type & 0x80) != 0x80) {
106                                 dev += PCI_DEV(0,0,7);
107                         }
108                 }
109         }
110 }
111
112 static void dump_pci_devices_on_bus(unsigned busn)
113 {
114         device_t dev;
115         for(dev = PCI_DEV(busn, 0, 0);
116                 dev <= PCI_DEV(busn, 0x1f, 0x7);
117                 dev += PCI_DEV(0,0,1)) {
118                 uint32_t id;
119                 id = pci_read_config32(dev, PCI_VENDOR_ID);
120                 if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
121                         (((id >> 16) & 0xffff) == 0xffff) ||
122                         (((id >> 16) & 0xffff) == 0x0000)) {
123                         continue;
124                 }
125                 dump_pci_device(dev);
126
127                 if(((dev>>12) & 0x07) == 0) {
128                         uint8_t hdr_type;
129                         hdr_type = pci_read_config8(dev, PCI_HEADER_TYPE);
130                         if((hdr_type & 0x80) != 0x80) {
131                                 dev += PCI_DEV(0,0,7);
132                         }
133                 }
134         }
135 }
136
137 #ifndef DEBUG_SMBUS
138 #define DEBUG_SMBUS 0
139 #endif
140
141 #if DEBUG_SMBUS == 1
142 static void dump_spd_registers(const struct mem_controller *ctrl)
143 {
144         int i;
145         print_debug("\n");
146         for(i = 0; i < 4; i++) {
147                 unsigned device;
148                 device = ctrl->channel0[i];
149                 if (device) {
150                         int j;
151                         printk_debug("dimm: %02x.0: %02x", i, device);
152                         for(j = 0; j < 128; j++) {
153                                 int status;
154                                 unsigned char byte;
155                                 if ((j & 0xf) == 0) {
156                                         printk_debug("\n%02x: ", j);
157                                 }
158                                 status = smbus_read_byte(device, j);
159                                 if (status < 0) {
160                                         break;
161                                 }
162                                 byte = status & 0xff;
163                                 printk_debug("%02x ", byte);
164                         }
165                         print_debug("\n");
166                 }
167                 device = ctrl->channel1[i];
168                 if (device) {
169                         int j;
170                         printk_debug("dimm: %02x.1: %02x", i, device);
171                         for(j = 0; j < 128; j++) {
172                                 int status;
173                                 unsigned char byte;
174                                 if ((j & 0xf) == 0) {
175                                         printk_debug("\n%02x: ", j);
176                                 }
177                                 status = smbus_read_byte(device, j);
178                                 if (status < 0) {
179                                         break;
180                                 }
181                                 byte = status & 0xff;
182                                 printk_debug("%02x ", byte);
183                         }
184                         print_debug("\n");
185                 }
186         }
187 }
188 static void dump_smbus_registers(void)
189 {
190         unsigned device;
191         print_debug("\n");
192         for(device = 1; device < 0x80; device++) {
193                 int j;
194                 if( smbus_read_byte(device, 0) < 0 ) continue;
195                 printk_debug("smbus: %02x", device);
196                 for(j = 0; j < 256; j++) {
197                         int status;
198                         unsigned char byte;
199                         status = smbus_read_byte(device, j);
200                         if (status < 0) {
201                                 break;
202                         }
203                         if ((j & 0xf) == 0) {
204                                 printk_debug("\n%02x: ",j);
205                         }
206                         byte = status & 0xff;
207                         printk_debug("%02x ", byte);
208                 }
209                 print_debug("\n");
210         }
211 }
212 #endif
213
214 static void dump_io_resources(unsigned port)
215 {
216
217         int i;
218         udelay(2000);
219         printk_debug("%04x:\n", port);
220         for(i=0;i<256;i++) {
221                 uint8_t val;
222                 if ((i & 0x0f) == 0) {
223                         printk_debug("%02x:", i);
224                 }
225                 val = inb(port);
226                 printk_debug(" %02x",val);
227                 if ((i & 0x0f) == 0x0f) {
228                         print_debug("\n");
229                 }
230                 port++;
231         }
232 }
233
234 static void dump_mem(unsigned start, unsigned end)
235 {
236         unsigned i;
237         print_debug("dump_mem:");
238         for(i=start;i<end;i++) {
239                 if((i & 0xf)==0) {
240                         printk_debug("\n%08x:", i);
241                 }
242                 printk_debug(" %02x", (unsigned char)*((unsigned char *)i));
243         }
244         print_debug("\n");
245  }
246 #endif