1 /*============================================================================
2 Copyright 2005 ADVANCED MICRO DEVICES, INC. All Rights Reserved.
3 This software and any related documentation (the "Materials") are the
4 confidential proprietary information of AMD. Unless otherwise provided in a
5 software agreement specifically licensing the Materials, the Materials are
6 provided in confidence and may not be distributed, modified, or reproduced in
7 whole or in part by any means.
8 LIMITATION OF LIABILITY: THE MATERIALS ARE PROVIDED "AS IS" WITHOUT ANY
9 EXPRESS OR IMPLIED WARRANTY OF ANY KIND, INCLUDING BUT NOT LIMITED TO
10 WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT, TITLE, FITNESS FOR ANY
11 PARTICULAR PURPOSE, OR WARRANTIES ARISING FROM CONDUCT, COURSE OF DEALING, OR
12 USAGE OF TRADE. IN NO EVENT SHALL AMD OR ITS LICENSORS BE LIABLE FOR ANY
13 DAMAGES WHATSOEVER (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS OF PROFITS,
14 BUSINESS INTERRUPTION, OR LOSS OF INFORMATION) ARISING OUT OF THE USE OF OR
15 INABILITY TO USE THE MATERIALS, EVEN IF AMD HAS BEEN ADVISED OF THE
16 POSSIBILITY OF SUCH DAMAGES. BECAUSE SOME JURISDICTIONS PROHIBIT THE EXCLUSION
17 OR LIMITATION OF LIABILITY FOR CONSEQUENTIAL OR INCIDENTAL DAMAGES, THE ABOVE
18 LIMITATION MAY NOT APPLY TO YOU.
19 AMD does not assume any responsibility for any errors which may appear in the
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31 ============================================================================*/
32 // 2005.9 serengeti support
37 * 2005.9 yhlu add madt lapic creat dynamically and SRAT related
40 #include <console/console.h>
42 #include <arch/acpi.h>
43 #include <arch/acpigen.h>
44 #include <device/pci.h>
45 #include <cpu/x86/msr.h>
46 #include <cpu/amd/mtrr.h>
47 #include <cpu/amd/amdk8_sysconf.h>
48 #include "amdk8_acpi.h"
50 //it seems some functions can be moved arch/i386/boot/acpi.c
52 unsigned long acpi_create_madt_lapic_nmis(unsigned long current, u16 flags, u8 lint)
57 for(cpu = all_devices; cpu; cpu = cpu->next) {
58 if ((cpu->path.type != DEVICE_PATH_APIC) ||
59 (cpu->bus->dev->path.type != DEVICE_PATH_APIC_CLUSTER)) {
65 current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)current, cpu_index, flags, lint);
71 unsigned long acpi_create_srat_lapics(unsigned long current)
76 for(cpu = all_devices; cpu; cpu = cpu->next) {
77 if ((cpu->path.type != DEVICE_PATH_APIC) ||
78 (cpu->bus->dev->path.type != DEVICE_PATH_APIC_CLUSTER)) {
84 printk_debug("SRAT: lapic cpu_index=%02x, node_id=%02x, apic_id=%02x\n", cpu_index, cpu->path.apic.node_id, cpu->path.apic.apic_id);
85 current += acpi_create_srat_lapic((acpi_srat_lapic_t *)current, cpu->path.apic.node_id, cpu->path.apic.apic_id);
91 static unsigned long resk(uint64_t value)
93 unsigned long resultk;
94 if (value < (1ULL << 42)) {
95 resultk = value >> 10;
102 struct acpi_srat_mem_state {
103 unsigned long current;
106 static void set_srat_mem(void *gp, struct device *dev, struct resource *res)
108 struct acpi_srat_mem_state *state = gp;
109 unsigned long basek, sizek;
110 basek = resk(res->base);
111 sizek = resk(res->size);
113 printk_debug("set_srat_mem: dev %s, res->index=%04lx startk=%08lx, sizek=%08lx\n",
114 dev_path(dev), res->index, basek, sizek);
116 * 0-640K must be on node 0
117 * next range is from 1M---
118 * So will cut off before 1M in the mem range
120 if((basek+sizek)<1024) return;
123 sizek -= 1024 - basek;
127 // need to figure out NV
128 state->current += acpi_create_srat_mem((acpi_srat_mem_t *)state->current, (res->index & 0xf), basek, sizek, 1);
131 unsigned long acpi_fill_srat(unsigned long current)
133 struct acpi_srat_mem_state srat_mem_state;
135 /* create all subtables for processors */
136 current = acpi_create_srat_lapics(current);
138 /* create all subteble for memory range */
140 /* 0-640K must be on node 0 */
141 current += acpi_create_srat_mem((acpi_srat_mem_t *)current, 0, 0, 640, 1);//enable
143 srat_mem_state.current = current;
144 search_global_resources(
145 IORESOURCE_MEM | IORESOURCE_CACHEABLE, IORESOURCE_MEM | IORESOURCE_CACHEABLE,
146 set_srat_mem, &srat_mem_state);
148 current = srat_mem_state.current;
152 unsigned long acpi_fill_slit(unsigned long current)
154 /* need to find out the node num at first */
155 /* fill the first 8 byte with that num */
156 /* fill the next num*num byte with distance, local is 10, 1 hop mean 20, and 2 hop with 30.... */
158 /* because We has assume that we know the topology of the HT connection, So we can have set if we know the node_num */
159 static u8 hops_8[] = { 0, 1, 1, 2, 2, 3, 3, 4,
160 1, 0, 2, 1, 3, 2, 4, 3,
161 1, 2, 0, 1, 1, 2, 2, 3,
162 2, 1, 1, 0, 2, 1, 3, 2,
163 2, 3, 1, 2, 0, 1, 1, 2,
164 3, 2, 2, 1, 1, 0, 2, 1,
165 3, 4, 2, 3, 1, 2, 0, 1,
166 4, 4, 3, 2, 2, 1, 1, 0 };
170 u8 *p = (u8 *)current;
171 int nodes = sysconf.nodes;
173 memset(p, 0, 8+nodes*nodes);
174 // memset((u8 *)outer_node, 0, 8);
179 for(i=0;i<sysconf.hc_possible_num;i++) {
180 if((sysconf.pci1234[i]&1) !=1 ) continue;
181 outer_node[(sysconf.pci1234[i] >> 4) & 0xf] = 1; // mark the outer node
185 for(i=0;i<nodes;i++) {
186 for(j=0;j<nodes; j++) {
192 u8 latency_factor = 0;
201 for(k=k_start;k<=k_end; k++) {
207 p[i*nodes+j] = hops_8[i*nodes+j] * 2 + latency_factor + 10;
209 p[i*nodes+j] = hops_8[i*nodes+j] * 2 + 10;
216 current += 8+nodes*nodes;
221 static int k8acpi_write_HT(void) {
224 len = acpigen_write_name("HCLK");
225 lenp = acpigen_write_package(HC_POSSIBLE_NUM);
227 for(i=0;i<sysconf.hc_possible_num;i++) {
228 lenp += acpigen_write_dword(sysconf.pci1234[i]);
230 for(i=sysconf.hc_possible_num; i<HC_POSSIBLE_NUM; i++) { // in case we set array size to other than 8
231 lenp += acpigen_write_dword(0x0);
234 acpigen_patch_len(lenp - 1);
237 len += acpigen_write_name("HCDN");
238 lenp = acpigen_write_package(HC_POSSIBLE_NUM);
240 for(i=0;i<sysconf.hc_possible_num;i++) {
241 lenp += acpigen_write_dword(sysconf.hcdn[i]);
243 for(i=sysconf.hc_possible_num; i<HC_POSSIBLE_NUM; i++) { // in case we set array size to other than 8
244 lenp += acpigen_write_dword(0x20202020);
246 acpigen_patch_len(lenp - 1);
252 static int k8acpi_write_pci_data(int dlen, const char *name, int offset) {
257 dev = dev_find_slot(0, PCI_DEVFN(0x18, 1));
259 len = acpigen_write_name(name);
260 lenp = acpigen_write_package(dlen);
261 for(i=0; i<dlen; i++) {
262 dword = pci_read_config32(dev, offset+i*4);
263 lenp += acpigen_write_dword(dword);
266 acpigen_patch_len(lenp - 1);
270 int k8acpi_write_vars(void)
274 char pscope[] = "\\_SB.PCI0";
276 lens = acpigen_write_scope(pscope);
277 lens += k8acpi_write_pci_data(4, "BUSN", 0xe0);
278 lens += k8acpi_write_pci_data(8, "PCIO", 0xc0);
279 lens += k8acpi_write_pci_data(16, "MMIO", 0x80);
280 lens += acpigen_write_name_byte("SBLK", sysconf.sblk);
281 lens += acpigen_write_name_byte("CBST",
282 ((sysconf.pci1234[0] >> 12) & 0xff) ? 0xf : 0x0);
283 lens += acpigen_write_name_dword("SBDN", sysconf.sbdn);
284 msr = rdmsr(TOP_MEM);
285 lens += acpigen_write_name_dword("TOM1", msr.lo);
286 msr = rdmsr(TOP_MEM2);
287 lens += acpigen_write_name_qword("TOM2", (((uint64_t) msr.hi) << 32) | msr.lo);
289 lens += k8acpi_write_HT();
291 acpigen_patch_len(lens - 1);