2 * This file is part of the LinuxBIOS project.
4 * Copyright (C) 2007 Advanced Micro Devices, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
23 /*----------------------------------------------------------------------------
24 * Mixed (DEFINITIONS AND MACROS / TYPEDEFS, STRUCTURES, ENUMS)
26 *----------------------------------------------------------------------------
29 /*-----------------------------------------------------------------------------
30 * DEFINITIONS AND MACROS
32 *-----------------------------------------------------------------------------
35 /* Width equates for call backs */
36 #define HT_WIDTH_8_BITS 8
37 #define HT_WIDTH_16_BITS 16
38 #define HT_WIDTH_4_BITS 4
39 #define HT_WIDTH_2_BITS 2
41 /* Frequency equates for call backs which take an actual frequency setting */
42 #define HT_FREQUENCY_200M 0
43 #define HT_FREQUENCY_400M 2
44 #define HT_FREQUENCY_600M 4
45 #define HT_FREQUENCY_800M 5
46 #define HT_FREQUENCY_1000M 6
47 #define HT_FREQUENCY_1200M 7
48 #define HT_FREQUENCY_1400M 8
49 #define HT_FREQUENCY_1600M 9
50 #define HT_FREQUENCY_1800M 10
51 #define HT_FREQUENCY_2000M 11
52 #define HT_FREQUENCY_2200M 12
53 #define HT_FREQUENCY_2400M 13
54 #define HT_FREQUENCY_2600M 14
56 /* Frequency Limit equates for call backs which take a frequency supported mask. */
57 #define HT_FREQUENCY_LIMIT_200M 1
58 #define HT_FREQUENCY_LIMIT_400M 7
59 #define HT_FREQUENCY_LIMIT_600M 0x1F
60 #define HT_FREQUENCY_LIMIT_800M 0x3F
61 #define HT_FREQUENCY_LIMIT_1000M 0x7F
62 #define HT_FREQUENCY_LIMIT_HT1_ONLY 0x7F
63 #define HT_FREQUENCY_LIMIT_1200M 0xFF
64 #define HT_FREQUENCY_LIMIT_1400M 0x1FF
65 #define HT_FREQUENCY_LIMIT_1600M 0x3FF
66 #define HT_FREQUENCY_LIMIT_1800M 0x7FF
67 #define HT_FREQUENCY_LIMIT_2000M 0xFFF
68 #define HT_FREQUENCY_LIMIT_2200M 0x1FFF
69 #define HT_FREQUENCY_LIMIT_2400M 0x3FFF
70 #define HT_FREQUENCY_LIMIT_2600M 0x7FFF
73 * Event Notify definitions
76 /* Event Class definitions */
77 #define HT_EVENT_CLASS_CRITICAL 1
78 #define HT_EVENT_CLASS_ERROR 2
79 #define HT_EVENT_CLASS_HW_FAULT 3
80 #define HT_EVENT_CLASS_WARNING 4
81 #define HT_EVENT_CLASS_INFO 5
83 /* Event definitions. */
85 /* Coherent subfunction events */
86 #define HT_EVENT_COH_EVENTS 0x1000
87 #define HT_EVENT_COH_NO_TOPOLOGY 0x1001
88 #define HT_EVENT_COH_LINK_EXCEED 0x1002
89 #define HT_EVENT_COH_FAMILY_FEUD 0x1003
90 #define HT_EVENT_COH_NODE_DISCOVERED 0x1004
91 #define HT_EVENT_COH_MPCAP_MISMATCH 0x1005
93 /* Non-coherent subfunction events */
94 #define HT_EVENT_NCOH_EVENTS 0x2000
95 #define HT_EVENT_NCOH_BUID_EXCEED 0x2001
96 #define HT_EVENT_NCOH_LINK_EXCEED 0x2002
97 #define HT_EVENT_NCOH_BUS_MAX_EXCEED 0x2003
98 #define HT_EVENT_NCOH_CFG_MAP_EXCEED 0x2004
99 #define HT_EVENT_NCOH_DEVICE_FAILED 0x2005
100 #define HT_EVENT_NCOH_AUTO_DEPTH 0x2006
102 /* Optimization subfunction events */
103 #define HT_EVENT_OPT_EVENTS 0x3000
104 #define HT_EVENT_OPT_REQUIRED_CAP_RETRY 0x3001
105 #define HT_EVENT_OPT_REQUIRED_CAP_GEN3 0x3002
107 /* HW Fault events */
108 #define HT_EVENT_HW_EVENTS 0x4000
109 #define HT_EVENT_HW_SYNCHFLOOD 0x4001
110 #define HT_EVENT_HW_HTCRC 0x4002
112 /* The bbHT component (hb*) uses 0x5000 for events.
113 * For consistency, we avoid that range here.
116 /*----------------------------------------------------------------------------
117 * TYPEDEFS, STRUCTURES, ENUMS
119 *----------------------------------------------------------------------------
125 /* Note: This should always be the form AutoBusCurrent+N*AutoBusIncrement, also bus 253-255 are reserved */
129 /**----------------------------------------------------------------------------------------
132 * AMD_CB_IgnoreLink(u8 Node, u8 Link)
135 * This routine is called every time a coherent link is found and then every
136 * time a non-coherent link from a CPU is found.
137 * Any coherent or non-coherent link from a CPU can be ignored and not used
138 * for discovery or initialization. Useful for connection based systems.
139 * (Note: not called for IO device to IO Device links.)
142 * @param[in] u8 node = The node on which this link is located
143 * @param[in] u8 link = The link about to be initialized
144 * @param[out] BOOL result = true to ignore this link and skip it
145 * false to initialize the link normally
147 * ---------------------------------------------------------------------------------------
149 BOOL (*AMD_CB_IgnoreLink)(u8 Node, u8 Link);
151 /**----------------------------------------------------------------------------------------
154 * AMD_CB_OverrideBusNumbers(u8 Node, u8 Link, u8 *SecBus, u8 *SubBus)
157 * This routine is called every time a non-coherent chain is processed.
158 * If a system can not use the auto Bus numbering feature for non-coherent chain bus
159 * assignments, this routine can provide explicit control. For each chain, provide
160 * the bus number range to use.
163 * @param[in] u8 node = The node on which this chain is located
164 * @param[in] u8 link = The link on the host for this chain
165 * @param[out] u8 secBus = Secondary Bus number for this non-coherent chain
166 * @param[out] u8* subBus = Subordinate Bus number
167 * @param[out] BOOL result = true this routine is supplying the bus numbers
168 * false use auto Bus numbering
170 * ---------------------------------------------------------------------------------------
172 BOOL (*AMD_CB_OverrideBusNumbers)(u8 Node, u8 Link, u8 *SecBus, u8 *SubBus);
174 /**----------------------------------------------------------------------------------------
177 * AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, u8 **List)
180 * This routine is called every time a non-coherent chain is processed.
181 * BUID assignment may be controlled explicitly on a non-coherent chain. Provide a
182 * swap list. The first part of the list controls the BUID assignment and the
183 * second part of the list provides the device to device linking. Device orientation
184 * can be detected automatically, or explicitly. See documentation for more details.
186 * Automatic non-coherent init assigns BUIDs starting at 1 and incrementing sequentially
187 * based on each device's unit count.
190 * @param[in] u8 node = The node on which this chain is located
191 * @param[in] u8 link = The link on the host for this chain
192 * @param[out] u8** list = supply a pointer to a list
193 * @param[out] BOOL result = true to use a manual list
194 * false to initialize the link automatically
196 * ---------------------------------------------------------------------------------------
198 BOOL (*AMD_CB_ManualBUIDSwapList)(u8 Node, u8 Link, u8 **List);
200 /**----------------------------------------------------------------------------------------
203 * AMD_CB_DeviceCapOverride(u8 HostNode, u8 HostLink, u8 Depth, u8 Segment,
204 * u8 Bus, u8 Dev, u32 DevVenID, u8 Link,
205 * u8 *LinkWidthIn, u8 *LinkWidthOut, u16 *FreqCap)
208 * This routine is called once for every link on every IO device.
209 * Update the width and frequency capability if needed for this device.
210 * This is used along with device capabilities, the limit call backs, and northbridge
211 * limits to compute the default settings. The components of the device's PCI config
212 * address are provided, so its settings can be consulted if need be. The input width
213 * and frequency are the reported device capabilities.
216 * @param[in] u8 hostNode = The node on which this chain is located
217 * @param[in] u8 hostLink = The link on the host for this chain
218 * @param[in] u8 Depth = The depth in the I/O chain from the Host
219 * @param[in] u8 Segment = The Device's PCI Bus Segment number
220 * @param[in] u8 Bus = The Device's PCI Bus number
221 * @param[in] u8 Dev = The Device's PCI device Number
222 * @param[in] u32 DevVenID = The Device's PCI Vendor + Device ID (offset 0x00)
223 * @param[in] u8 Link = The Device's link number (0 or 1)
224 * @param[in,out] u8* LinkWidthIn = modify to change the Link Witdh In
225 * @param[in,out] u8* LinkWidthOut = modify to change the Link Witdh Out
226 * @param[in,out] u16* FreqCap = modify to change the link's frequency capability
228 * ---------------------------------------------------------------------------------------
230 void (*AMD_CB_DeviceCapOverride)(
244 /**----------------------------------------------------------------------------------------
247 * AMD_CB_Cpu2CpuPCBLimits(u8 NodeA, u8 LinkA, u8 NodeB, u8 LinkB,
248 * u8 *ABLinkWidthLimit, u8 *BALinkWidthLimit, u16 *PCBFreqCap)
251 * For each coherent connection this routine is called once.
252 * Update the frequency and width if needed for this link (usually based on board
253 * restriction). This is used with CPU device capabilities and northbridge limits
254 * to compute the default settings. The input width and frequency are valid, but do
255 * not necessarily reflect the minimum setting that will be chosen.
258 * @param[in] u8 nodeA = One node on which this link is located
259 * @param[in] u8 linkA = The link on this node
260 * @param[in] u8 nodeB = The other node on which this link is located
261 * @param[in] u8 linkB = The link on that node
262 * @param[in,out] u8* ABLinkWidthLimit = modify to change the Link Witdh In
263 * @param[in,out] u8* BALinkWidthLimit = modify to change the Link Witdh Out
264 * @param[in,out] u16* PCBFreqCap = modify to change the link's frequency capability
266 * ---------------------------------------------------------------------------------------
268 void (*AMD_CB_Cpu2CpuPCBLimits)(
273 u8 *ABLinkWidthLimit,
274 u8 *BALinkWidthLimit,
278 /**----------------------------------------------------------------------------------------
281 * AMD_CB_IOPCBLimits(u8 HostNode, u8 HostLink, u8 Depth, u8 *DownstreamLinkWidthLimit,
282 * u8 *UpstreamLinkWidthLimit, u16 *PCBFreqCap)
285 * For each non-coherent connection this routine is called once.
286 * Update the frequency and width if needed for this link (usually based on board
287 * restriction). This is used with device capabilities, device overrides, and northbridge limits
288 * to compute the default settings. The input width and frequency are valid, but do
289 * not necessarily reflect the minimum setting that will be chosen.
292 * @param[in] u8 hostNode = The node on which this link is located
293 * @param[in] u8 hostLink = The link about to be initialized
294 * @param[in] u8 Depth = The depth in the I/O chain from the Host
295 * @param[in,out] u8* DownstreamLinkWidthLimit = modify to change the Link Witdh In
296 * @param[in,out] u8* UpstreamLinkWidthLimit = modify to change the Link Witdh Out
297 * @param[in,out] u16* PCBFreqCap = modify to change the link's frequency capability
299 * ---------------------------------------------------------------------------------------
301 void (*AMD_CB_IOPCBLimits)(
305 u8 *DownstreamLinkWidthLimit,
306 u8 *UpstreamLinkWidthLimit,
310 /**----------------------------------------------------------------------------------------
313 * AMD_CB_SkipRegang(u8 NodeA, u8 LinkA, u8 NodeB, u8 LinkB)
316 * This routine is called whenever two sublinks are both connected to the same CPUs.
317 * Normally, unganged subsinks between the same two CPUs are reganged.
318 * Return true from this routine to leave the links unganged.
321 * @param[in] u8 nodeA = One node on which this link is located
322 * @param[in] u8 linkA = The link on this node
323 * @param[in] u8 nodeB = The other node on which this link is located
324 * @param[in] u8 linkB = The link on that node
325 * @param[out] BOOL result = true to leave link unganged
326 * false to regang link automatically
328 * ---------------------------------------------------------------------------------------
330 BOOL (*AMD_CB_SkipRegang)(
337 /**----------------------------------------------------------------------------------------
340 * AMD_CB_CustomizeTrafficDistribution()
343 * Near the end of HT initialization, this routine is called once.
344 * If this routine will handle traffic distribution in a proprietary way,
345 * after detecting which links to distribute traffic on and configuring the system,
346 * return true. Return false to let the HT code detect and do traffic distribution
347 * This routine can also be used to simply turn this feature off, or to pre-process
348 * the system before normal traffic distribution.
351 * @param[out] BOOL result = true skip traffic distribution
352 * false do normal traffic distribution
354 * ---------------------------------------------------------------------------------------
356 BOOL (*AMD_CB_CustomizeTrafficDistribution)();
359 /**----------------------------------------------------------------------------------------
362 * AMD_CB_CustomizeBuffers(u8 Node)
365 * Near the end of HT initialization, this routine is called once per CPU node.
366 * Implement proprietary buffer tuning and return true, or return false for normal tuning.
367 * This routine can also be used to simply turn this feature off, or to pre-process
368 * the system before normal tuning.
371 * @param[in] u8 node = buffer allocation may apply to this node
372 * @param[out] BOOL result = true skip buffer allocation on this node
373 * false tune buffers normally
375 * ---------------------------------------------------------------------------------------
377 BOOL (*AMD_CB_CustomizeBuffers)( u8 node );
379 /**----------------------------------------------------------------------------------------
382 * AMD_CB_OverrideDevicePort(u8 HostNode, u8 HostLink, u8 Depth, u8 *LinkWidthIn,
383 * u8 *LinkWidthOut, u16 *LinkFrequency)
386 * Called once for each active link on each IO device.
387 * Provides an opportunity to directly control the frequency and width,
388 * intended for test and debug. The input frequency and width will be used
392 * @param[in] u8 hostNode = The node on which this link is located
393 * @param[in] u8 hostLink = The link about to be initialized
394 * @param[in] u8 Depth = The depth in the I/O chain from the Host
395 * @param[in] u8 Link = the link on the device (0 or 1)
396 * @param[in,out] u8* LinkWidthIn = modify to change the Link Witdh In
397 * @param[in,out] u8* LinkWidthOut = modify to change the Link Witdh Out
398 * @param[in,out] u16* LinkFrequency = modify to change the link's frequency capability
400 * ---------------------------------------------------------------------------------------
402 void (*AMD_CB_OverrideDevicePort)(
412 /**----------------------------------------------------------------------------------------
415 * AMD_CB_OverrideCpuPort(u8 Node, u8 Link, u8 *LinkWidthIn, u8 *LinkWidthOut,
416 * u16 *LinkFrequency)
419 * Called once for each active link on each CPU.
420 * Provides an opportunity to directly control the frequency and width,
421 * intended for test and debug. The input frequency and width will be used
425 * @param[in] u8 node = One node on which this link is located
426 * @param[in] u8 link = The link on this node
427 * @param[in,out] u8* LinkWidthIn = modify to change the Link Witdh In
428 * @param[in,out] u8* LinkWidthOut = modify to change the Link Witdh Out
429 * @param[in,out] u16* LinkFrequency = modify to change the link's frequency capability
431 *---------------------------------------------------------------------------------------
433 void (*AMD_CB_OverrideCpuPort)(
441 /**----------------------------------------------------------------------------------------
444 * AMD_CB_EventNotify(u8 evtClass, u16 event, const u8 *pEventData0)
447 * Errors, events, faults, warnings, and useful information are provided by
448 * calling this routine as often as necessary, once for each notification.
449 * See elsewhere in this file for class, event, and event data definitions.
450 * See the documentation for more details.
453 * @param[in] u8 evtClass = What level event is this
454 * @param[in] u16 event = A unique ID of this event
455 * @param[in] u8* pEventData0 = useful data associated with the event.
457 * ---------------------------------------------------------------------------------------
459 void (*AMD_CB_EventNotify) (
462 const u8 *pEventData0
468 * Event Notification Structures
469 * These structures are passed to AMD_CB_EventNotify as *pEventData0.
472 /* For event HT_EVENT_HW_SYNCHFLOOD */
478 } sHtEventHWSynchFlood;
480 /* For event HT_EVENT_HW_HTCRC */
489 /* For event HT_EVENT_NCOH_BUS_MAX_EXCEED */
496 } sHTEventNcohBusMaxExceed;
498 /* For event HT_EVENT_NCOH_LINK_EXCEED */
506 } sHtEventNcohLinkExceed;
508 /* For event HT_EVENT_NCOH_CFG_MAP_EXCEED */
514 } sHtEventNcohCfgMapExceed;
516 /* For event HT_EVENT_NCOH_BUID_EXCEED */
525 } sHtEventNcohBuidExceed;
527 /* For event HT_EVENT_NCOH_DEVICE_FAILED */
535 } sHtEventNcohDeviceFailed;
537 /* For event HT_EVENT_NCOH_AUTO_DEPTH */
544 } sHtEventNcohAutoDepth;
546 /* For event HT_EVENT_OPT_REQUIRED_CAP_RETRY,
547 * HT_EVENT_OPT_REQUIRED_CAP_GEN3
555 } sHtEventOptRequiredCap;
557 /* For event HT_EVENT_COH_NO_TOPOLOGY */
562 } sHtEventCohNoTopology;
564 /* For event HT_EVENT_COH_LINK_EXCEED */
573 } sHtEventCohLinkExceed;
575 /* For event HT_EVENT_COH_FAMILY_FEUD */
582 } sHtEventCohFamilyFeud;
584 /* For event HT_EVENT_COH_NODE_DISCOVERED */
591 } sHtEventCohNodeDiscovered;
593 /* For event HT_EVENT_COH_MPCAP_MISMATCH */
601 } sHtEventCohMpCapMismatch;
603 /*----------------------------------------------------------------------------
604 * FUNCTIONS PROTOTYPE
606 *----------------------------------------------------------------------------
608 void amdHtInitialize(AMD_HTBLOCK *pBlock);
611 #endif /* H3FINIT_H */