src/northbridge/amd/amdfam10/setup_resource_map.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2007 Advanced Micro Devices, Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; version 2 of the License.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  18  */
  19
  20
  21 #define RES_DEBUG 0
  22
  23 static void setup_resource_map(const u32 *register_values, u32 max)
  24 {
  25         u32 i;
  26 //      print_debug("setting up resource map....");
  27
  28         for(i = 0; i < max; i += 3) {
  29                 device_t dev;
  30                 u32 where;
  31                 u32 reg;
  32
  33                 dev = register_values[i] & ~0xff;
  34                 where = register_values[i] & 0xff;
  35                 reg = pci_read_config32(dev, where);
  36                 reg &= register_values[i+1];
  37                 reg |= register_values[i+2];
  38                 pci_write_config32(dev, where, reg);
  39         }
  40 //      print_debug("done.\n");
  41 }
  42
  43
  44 void setup_resource_map_offset(const u32 *register_values, u32 max, u32 offset_pci_dev, u32 offset_io_base)
  45 {
  46         u32 i;
  47 //      print_debug("setting up resource map offset....");
  48         for(i = 0; i < max; i += 3) {
  49                 device_t dev;
  50                 u32 where;
  51                 unsigned long reg;
  52                 dev = (register_values[i] & ~0xfff) + offset_pci_dev;
  53                 where = register_values[i] & 0xfff;
  54                 reg = pci_read_config32(dev, where);
  55                 reg &= register_values[i+1];
  56                 reg |= register_values[i+2] + offset_io_base;
  57                 pci_write_config32(dev, where, reg);
  58         }
  59 //      print_debug("done.\n");
  60 }
  61
  62 #define RES_PCI_IO 0x10
  63 #define RES_PORT_IO_8 0x22
  64 #define RES_PORT_IO_32 0x20
  65 #define RES_MEM_IO 0x40
  66
  67 void setup_resource_map_x_offset(const u32 *register_values, u32 max, u32 offset_pci_dev, u32 offset_io_base)
  68 {
  69         u32 i;
  70
  71 #if RES_DEBUG
  72         print_debug("setting up resource map ex offset....");
  73
  74 #endif
  75
  76 #if RES_DEBUG
  77         print_debug("\n");
  78 #endif
  79         for(i = 0; i < max; i += 4) {
  80 #if RES_DEBUG
  81                 printk(BIOS_DEBUG, "%04x: %02x %08x <- & %08x | %08x\n",
  82                         i/4, register_values[i],
  83                         register_values[i+1] + ( (register_values[i]==RES_PCI_IO) ? offset_pci_dev : 0),
  84                         register_values[i+2],
  85                         register_values[i+3] + ( ( (register_values[i] & RES_PORT_IO_32) == RES_PORT_IO_32) ? offset_io_base : 0)
  86                         );
  87 #endif
  88                 switch (register_values[i]) {
  89                 case RES_PCI_IO: //PCI
  90                         {
  91                         device_t dev;
  92                         u32 where;
  93                         u32 reg;
  94                         dev = (register_values[i+1] & ~0xfff) + offset_pci_dev;
  95                         where = register_values[i+1] & 0xfff;
  96                         reg = pci_read_config32(dev, where);
  97                         reg &= register_values[i+2];
  98                         reg |= register_values[i+3];
  99                         pci_write_config32(dev, where, reg);
 100                         }
 101                         break;
 102                 case RES_PORT_IO_8: // io 8
 103                         {
 104                         u32 where;
 105                         u32 reg;
 106                         where = register_values[i+1] + offset_io_base;
 107                         reg = inb(where);
 108                         reg &= register_values[i+2];
 109                         reg |= register_values[i+3];
 110                         outb(reg, where);
 111                         }
 112                         break;
 113                 case RES_PORT_IO_32:  //io32
 114                         {
 115                         u32 where;
 116                         u32 reg;
 117                         where = register_values[i+1] + offset_io_base;
 118                         reg = inl(where);
 119                         reg &= register_values[i+2];
 120                         reg |= register_values[i+3];
 121                         outl(reg, where);
 122                         }
 123                         break;
 124                 } // switch
 125
 126
 127         }
 128
 129 #if RES_DEBUG
 130         print_debug("done.\n");
 131 #endif
 132 }
 133
 134 void setup_resource_map_x(const u32 *register_values, u32 max)
 135 {
 136         u32 i;
 137
 138 #if RES_DEBUG
 139         print_debug("setting up resource map ex offset....");
 140 #endif
 141
 142 #if RES_DEBUG
 143         print_debug("\n");
 144 #endif
 145         for(i = 0; i < max; i += 4) {
 146 #if RES_DEBUG
 147                 printk(BIOS_DEBUG, "%04x: %02x %08x <- & %08x | %08x\n",
 148                 i/4, register_values[i],register_values[i+1], register_values[i+2], register_values[i+3]);
 149 #endif
 150                 switch (register_values[i]) {
 151                 case RES_PCI_IO: //PCI
 152                         {
 153                         device_t dev;
 154                         u32 where;
 155                         u32 reg;
 156                         dev = register_values[i+1] & ~0xff;
 157                         where = register_values[i+1] & 0xff;
 158                         reg = pci_read_config32(dev, where);
 159                         reg &= register_values[i+2];
 160                         reg |= register_values[i+3];
 161                         pci_write_config32(dev, where, reg);
 162                         }
 163                         break;
 164                 case RES_PORT_IO_8: // io 8
 165                         {
 166                         u32 where;
 167                         u32 reg;
 168                         where = register_values[i+1];
 169                         reg = inb(where);
 170                         reg &= register_values[i+2];
 171                         reg |= register_values[i+3];
 172                         outb(reg, where);
 173                         }
 174                         break;
 175                 case RES_PORT_IO_32:  //io32
 176                         {
 177                         u32 where;
 178                         u32 reg;
 179                         where = register_values[i+1];
 180                         reg = inl(where);
 181                         reg &= register_values[i+2];
 182                         reg |= register_values[i+3];
 183                         outl(reg, where);
 184                         }
 185                         break;
 186                 } // switch
 187
 188
 189         }
 190
 191 #if RES_DEBUG
 192         print_debug("done.\n");
 193 #endif
 194 }
 195
 196 #if 0
 197 static void setup_iob_resource_map(const u32 *register_values, u32 max)
 198 {
 199         u32 i;
 200
 201         for(i = 0; i < max; i += 3) {
 202                 u32 where;
 203                 u32 reg;
 204
 205                 where = register_values[i];
 206                 reg = inb(where);
 207                 reg &= register_values[i+1];
 208                 reg |= register_values[i+2];
 209                 outb(reg, where);
 210         }
 211 }
 212
 213 static void setup_io_resource_map(const u32 *register_values, u32 max)
 214 {
 215         u32 i;
 216
 217         for(i = 0; i < max; i += 3) {
 218                 u32 where;
 219                 u32 reg;
 220
 221                 where = register_values[i];
 222                 reg = inl(where);
 223                 reg &= register_values[i+1];
 224                 reg |= register_values[i+2];
 225
 226                 outl(reg, where);
 227         }
 228 }
 229 #endif
 230