2 * This file is part of the coreboot project.
4 * Copyright (C) 2007 Advanced Micro Devices, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 static void print_raminit(const char *strval, u32 val)
23 printk_debug("%s%08x\n", strval, val);
27 #define RAMINIT_DEBUG 1
30 static void print_tx(const char *strval, u32 val)
32 #if RAMINIT_DEBUG == 1
33 print_raminit(strval, val);
38 static void print_t(const char *strval)
40 #if RAMINIT_DEBUG == 1
45 #include "../amdmct/wrappers/mcti.h"
46 #include "../amdmct/amddefs.h"
47 #include "../amdmct/mct/mct_d.h"
48 #include "../amdmct/mct/mct_d_gcc.h"
50 #include "../amdmct/wrappers/mcti_d.c"
51 #include "../amdmct/mct/mct_d.c"
54 #include "../amdmct/mct/mctmtr_d.c"
55 #include "../amdmct/mct/mctcsi_d.c"
56 #include "../amdmct/mct/mctecc_d.c"
57 #include "../amdmct/mct/mctpro_d.c"
58 #include "../amdmct/mct/mctdqs_d.c"
59 #include "../amdmct/mct/mctsrc.c"
60 #include "../amdmct/mct/mctsrc1p.c"
61 #include "../amdmct/mct/mcttmrl.c"
62 #include "../amdmct/mct/mcthdi.c"
63 #include "../amdmct/mct/mctndi_d.c"
64 #include "../amdmct/mct/mctchi_d.c"
66 #if CONFIG_CPU_SOCKET_TYPE == 0x10
68 #include "../amdmct/mct/mctardk3.c"
69 #elif CONFIG_CPU_SOCKET_TYPE == 0x11
71 #include "../amdmct/mct/mctardk4.c"
72 //#elif SYSTEM_TYPE == MOBILE
74 //#include "../amdmct/mct/mctardk5.c"
77 #include "../amdmct/mct/mct_fd.c"
79 int mctRead_SPD(u32 smaddr, u32 reg)
81 return spd_read_byte(smaddr, reg);
85 void mctSMBhub_Init(u32 node)
87 struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
88 struct mem_controller *ctrl = &( sysinfo->ctrl[node] );
89 activate_spd_rom(ctrl);
93 void mctGet_DIMMAddr(struct DCTStatStruc *pDCTstat, u32 node)
96 struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
97 struct mem_controller *ctrl = &( sysinfo->ctrl[node] );
99 for(j=0;j<DIMM_SOCKETS;j++) {
100 pDCTstat->DIMMAddr[j*2] = ctrl->spd_addr[j] & 0xff;
101 pDCTstat->DIMMAddr[j*2+1] = ctrl->spd_addr[DIMM_SOCKETS + j] & 0xff;
107 u32 mctGetLogicalCPUID(u32 Node)
109 /* FIXME: Move this to a more generic place. Maybe to the CPU code */
110 /* Converts the CPUID to a logical ID MASK that is used to check
111 CPU version support versions */
114 u32 family, model, stepping;
117 if (Node == 0xFF) { /* current node */
118 val = cpuid_eax(0x80000001);
120 dev = PA_NBMISC(Node);
121 val = Get_NB32(dev, 0xfc);
124 family = ((val >> 8) & 0x0f) + ((val >> 20) & 0xff);
125 model = ((val >> 4) & 0x0f) | ((val >> (16-4)) & 0xf0);
126 stepping = val & 0x0f;
128 valx = (family << 12) | (model << 4) | (stepping);
156 /* FIXME: mabe we should die() here. */
157 print_err("FIXME! CPU Version unknown or not supported! \n");
165 void raminit_amdmct(struct sys_info *sysinfo)
167 struct MCTStatStruc *pMCTstat = &(sysinfo->MCTstat);
168 struct DCTStatStruc *pDCTstatA = sysinfo->DCTstatA;
170 print_debug("raminit_amdmct begin:\n");
172 mctAutoInitMCT_D(pMCTstat, pDCTstatA);
174 print_debug("raminit_amdmct end:\n");