src/northbridge/amd/amdfam10/debug.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2007 Advanced Micro Devices, Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; version 2 of the License.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  18  */
  19
  20 /*
  21  * Generic FAM10 debug code, used by mainboard specific romstage.c
  22  */
  23
  24 #include "pci.c"
  25 #include <delay.h>
  26
  27 static inline void print_debug_addr(const char *str, void *val)
  28 {
  29 #if CONFIG_DEBUG_CAR
  30                 printk(BIOS_DEBUG, "------Address debug: %s%p------\n", str, val);
  31 #endif
  32 }
  33
  34 static void print_debug_pci_dev(u32 dev)
  35 {
  36 #if CONFIG_PCI_BUS_SEGN_BITS==0
  37         printk(BIOS_DEBUG, "PCI: %02x:%02x.%02x", (dev>>20) & 0xff, (dev>>15) & 0x1f, (dev>>12) & 0x7);
  38 #else
  39         printk(BIOS_DEBUG, "PCI: %04x:%02x:%02x.%02x", (dev>>28) & 0x0f, (dev>>20) & 0xff, (dev>>15) & 0x1f, (dev>>12) & 0x7);
  40 #endif
  41 }
  42
  43 static inline void print_pci_devices(void)
  44 {
  45         device_t dev;
  46         for(dev = PCI_DEV(0, 0, 0);
  47                 dev <= PCI_DEV(0xff, 0x1f, 0x7);
  48                 dev += PCI_DEV(0,0,1)) {
  49                 u32 id;
  50                 id = pci_read_config32(dev, PCI_VENDOR_ID);
  51                 if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
  52                         (((id >> 16) & 0xffff) == 0xffff) ||
  53                         (((id >> 16) & 0xffff) == 0x0000)) {
  54                         continue;
  55                 }
  56                 print_debug_pci_dev(dev);
  57                 printk(BIOS_DEBUG, " %04x:%04x\n", (id & 0xffff), (id>>16));
  58                 if(((dev>>12) & 0x07) == 0) {
  59                         u8 hdr_type;
  60                         hdr_type = pci_read_config8(dev, PCI_HEADER_TYPE);
  61                         if((hdr_type & 0x80) != 0x80) {
  62                                 dev += PCI_DEV(0,0,7);
  63                         }
  64                 }
  65         }
  66 }
  67
  68 static inline void print_pci_devices_on_bus(u32 busn)
  69 {
  70         device_t dev;
  71         for(dev = PCI_DEV(busn, 0, 0);
  72                 dev <= PCI_DEV(busn, 0x1f, 0x7);
  73                 dev += PCI_DEV(0,0,1)) {
  74                 u32 id;
  75                 id = pci_read_config32(dev, PCI_VENDOR_ID);
  76                 if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
  77                    (((id >> 16) & 0xffff) == 0xffff) ||
  78                    (((id >> 16) & 0xffff) == 0x0000)) {
  79                         continue;
  80                 }
  81                 print_debug_pci_dev(dev);
  82                 printk(BIOS_DEBUG, " %04x:%04x\n", (id & 0xffff), (id>>16));
  83                 if(((dev>>12) & 0x07) == 0) {
  84                         u8 hdr_type;
  85                         hdr_type = pci_read_config8(dev, PCI_HEADER_TYPE);
  86                         if((hdr_type & 0x80) != 0x80) {
  87                                  dev += PCI_DEV(0,0,7);
  88                         }
  89                 }
  90         }
  91 }
  92
  93 static void dump_pci_device_range(u32 dev, u32 start_reg, u32 size)
  94 {
  95         int i;
  96         print_debug_pci_dev(dev);
  97         int j;
  98         int end = start_reg + size;
  99
 100         for(i = start_reg; i < end; i+=4) {
 101                 u32 val;
 102                 if ((i & 0x0f) == 0) {
 103                         printk(BIOS_DEBUG, "\n%04x:",i);
 104                 }
 105                 val = pci_read_config32(dev, i);
 106                 for(j=0;j<4;j++) {
 107                         printk(BIOS_DEBUG, " %02x", val & 0xff);
 108                         val >>= 8;
 109                 }
 110         }
 111         print_debug("\n");
 112 }
 113
 114 static void dump_pci_device(u32 dev)
 115 {
 116         dump_pci_device_range(dev, 0, 4096);
 117 }
 118
 119 static void dump_pci_device_index_wait_range(u32 dev, u32 index_reg, u32 start,
 120                                         u32 size)
 121 {
 122         int i;
 123         int end = start + size;
 124         print_debug_pci_dev(dev);
 125         print_debug(" -- index_reg="); print_debug_hex32(index_reg);
 126
 127         for(i = start; i < end; i++) {
 128                 u32 val;
 129                 int j;
 130                 printk(BIOS_DEBUG, "\n%02x:",i);
 131                 val = pci_read_config32_index_wait(dev, index_reg, i);
 132                 for(j=0;j<4;j++) {
 133                         printk(BIOS_DEBUG, " %02x", val & 0xff);
 134                         val >>= 8;
 135                 }
 136
 137         }
 138         print_debug("\n");
 139 }
 140
 141 static inline void dump_pci_device_index_wait(u32 dev, u32 index_reg)
 142 {
 143         dump_pci_device_index_wait_range(dev, index_reg, 0, 0x54);
 144         dump_pci_device_index_wait_range(dev, index_reg, 0x100, 0x08); //DIMM1 when memclk > 400Hz
 145 //      dump_pci_device_index_wait_range(dev, index_reg, 0x200, 0x08); //DIMM2
 146 //      dump_pci_device_index_wait_range(dev, index_reg, 0x300, 0x08); //DIMM3
 147 }
 148
 149 static inline void dump_pci_device_index(u32 dev, u32 index_reg, u32 type, u32 length)
 150 {
 151         int i;
 152         print_debug_pci_dev(dev);
 153
 154         print_debug(" index reg: "); print_debug_hex16(index_reg); print_debug(" type: "); print_debug_hex8(type);
 155
 156         type<<=28;
 157
 158         for(i = 0; i < length; i++) {
 159                 u32 val;
 160                 if ((i & 0x0f) == 0) {
 161                         printk(BIOS_DEBUG, "\n%02x:",i);
 162                 }
 163                 val = pci_read_config32_index(dev, index_reg, i|type);
 164                 printk(BIOS_DEBUG, " %08x", val);
 165         }
 166         print_debug("\n");
 167 }
 168
 169 static inline void dump_pci_devices(void)
 170 {
 171         device_t dev;
 172         for(dev = PCI_DEV(0, 0, 0);
 173                 dev <= PCI_DEV(0xff, 0x1f, 0x7);
 174                 dev += PCI_DEV(0,0,1)) {
 175                 u32 id;
 176                 id = pci_read_config32(dev, PCI_VENDOR_ID);
 177                 if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
 178                         (((id >> 16) & 0xffff) == 0xffff) ||
 179                         (((id >> 16) & 0xffff) == 0x0000)) {
 180                         continue;
 181                 }
 182                 dump_pci_device(dev);
 183
 184                 if(((dev>>12) & 0x07) == 0) {
 185                         u8 hdr_type;
 186                         hdr_type = pci_read_config8(dev, PCI_HEADER_TYPE);
 187                         if((hdr_type & 0x80) != 0x80) {
 188                                 dev += PCI_DEV(0,0,7);
 189                         }
 190                 }
 191         }
 192 }
 193
 194 static inline void dump_pci_devices_on_bus(u32 busn)
 195 {
 196         device_t dev;
 197         for(dev = PCI_DEV(busn, 0, 0);
 198                 dev <= PCI_DEV(busn, 0x1f, 0x7);
 199                 dev += PCI_DEV(0,0,1)) {
 200                 u32 id;
 201                 id = pci_read_config32(dev, PCI_VENDOR_ID);
 202                 if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
 203                    (((id >> 16) & 0xffff) == 0xffff) ||
 204                    (((id >> 16) & 0xffff) == 0x0000)) {
 205                         continue;
 206                 }
 207                 dump_pci_device(dev);
 208
 209                 if(((dev>>12) & 0x07) == 0) {
 210                         u8 hdr_type;
 211                         hdr_type = pci_read_config8(dev, PCI_HEADER_TYPE);
 212                         if((hdr_type & 0x80) != 0x80) {
 213                                 dev += PCI_DEV(0,0,7);
 214                         }
 215                 }
 216         }
 217 }
 218
 219 #if CONFIG_DEBUG_SMBUS
 220
 221 static void dump_spd_registers(const struct mem_controller *ctrl)
 222 {
 223         int i;
 224         print_debug("\n");
 225         for(i = 0; i < DIMM_SOCKETS; i++) {
 226                 u32 device;
 227                 device = ctrl->spd_addr[i];
 228                 if (device) {
 229                         int j;
 230                         printk(BIOS_DEBUG, "dimm: %02x.0: %02x", i, device);
 231                         for(j = 0; j < 128; j++) {
 232                                 int status;
 233                                 u8 byte;
 234                                 if ((j & 0xf) == 0) {
 235                                         printk(BIOS_DEBUG, "\n%02x: ", j);
 236                                 }
 237                                 status = smbus_read_byte(device, j);
 238                                 if (status < 0) {
 239                                         break;
 240                                 }
 241                                 byte = status & 0xff;
 242                                 printk(BIOS_DEBUG, "%02x ", byte);
 243                         }
 244                         print_debug("\n");
 245                 }
 246                 device = ctrl->spd_addr[i+DIMM_SOCKETS];
 247                 if (device) {
 248                         int j;
 249                         printk(BIOS_DEBUG, "dimm: %02x.1: %02x", i, device);
 250                         for(j = 0; j < 128; j++) {
 251                                 int status;
 252                                 u8 byte;
 253                                 if ((j & 0xf) == 0) {
 254                                         printk(BIOS_DEBUG, "\n%02x: ", j);
 255                                 }
 256                                 status = smbus_read_byte(device, j);
 257                                 if (status < 0) {
 258                                         break;
 259                                 }
 260                                 byte = status & 0xff;
 261                                 printk(BIOS_DEBUG, "%02x ", byte);
 262                         }
 263                         print_debug("\n");
 264                 }
 265         }
 266 }
 267 static void dump_smbus_registers(void)
 268 {
 269         u32 device;
 270         print_debug("\n");
 271         for(device = 1; device < 0x80; device++) {
 272                 int j;
 273                 if( smbus_read_byte(device, 0) < 0 ) continue;
 274                 printk(BIOS_DEBUG, "smbus: %02x", device);
 275                 for(j = 0; j < 256; j++) {
 276                         int status;
 277                         u8 byte;
 278                         status = smbus_read_byte(device, j);
 279                         if (status < 0) {
 280                                 break;
 281                         }
 282                         if ((j & 0xf) == 0) {
 283                                 printk(BIOS_DEBUG, "\n%02x: ",j);
 284                         }
 285                         byte = status & 0xff;
 286                         printk(BIOS_DEBUG, "%02x ", byte);
 287                 }
 288                 print_debug("\n");
 289         }
 290 }
 291 #endif
 292 static inline void dump_io_resources(u32 port)
 293 {
 294
 295         int i;
 296         udelay(2000);
 297         printk(BIOS_DEBUG, "%04x:\n", port);
 298         for(i=0;i<256;i++) {
 299                 u8 val;
 300                 if ((i & 0x0f) == 0) {
 301                         printk(BIOS_DEBUG, "%02x:", i);
 302                 }
 303                 val = inb(port);
 304                 printk(BIOS_DEBUG, " %02x",val);
 305                 if ((i & 0x0f) == 0x0f) {
 306                         print_debug("\n");
 307                 }
 308                 port++;
 309         }
 310 }
 311
 312 static inline void dump_mem(u32 start, u32 end)
 313 {
 314         u32 i;
 315         print_debug("dump_mem:");
 316         for(i=start;i<end;i++) {
 317                 if((i & 0xf)==0) {
 318                         printk(BIOS_DEBUG, "\n%08x:", i);
 319                 }
 320                 printk(BIOS_DEBUG, " %02x", (u8)*((u8 *)i));
 321         }
 322         print_debug("\n");
 323 }