2 * This file is part of the coreboot project.
4 * Copyright (C) 2007 AMD
5 * (Written by Yinghai Lu <yinghailu@amd.com> for AMD)
6 * Copyright (C) 2007 Philipp Degler <pdegler@rumms.uni-mannheim.de>
7 * (Thanks to LSRA University of Mannheim for their support)
8 * Copyright (C) 2008 Jonathan A. Kollasch <jakllsch@kollasch.net>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
25 #include <console/console.h>
26 #include <arch/smp/mpspec.h>
27 #include <arch/ioapic.h>
28 #include <device/pci.h>
31 #include "southbridge/via/vt8237r/vt8237r.h"
33 static void *smp_write_config_table(void *v)
35 struct mp_config_table *mc;
38 mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
40 mptable_init(mc, LOCAL_APIC_ADDR);
42 smp_write_processors(mc);
43 mptable_write_buses(mc, NULL, &isa_bus);
45 /* I/O APICs: APIC ID Version State Address*/
46 smp_write_ioapic(mc, VT8237R_APIC_ID, 0x20, IO_APIC_ADDR);
48 /* Now, assemble the table. */
49 mptable_add_isa_interrupts(mc, isa_bus, VT8237R_APIC_ID, 0);
51 #define PCI_INT(bus, dev, fn, pin) \
52 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, \
53 bus, (((dev)<<2)|(fn)), VT8237R_APIC_ID, (pin))
68 PCI_INT(0, 15, 1, 20);
71 PCI_INT(0, 16, 0, 21);
72 PCI_INT(0, 16, 1, 21);
73 PCI_INT(0, 16, 2, 21);
74 PCI_INT(0, 16, 3, 21);
77 PCI_INT(0, 17, 2, 22);
80 PCI_INT(0, 18, 0, 23);
85 /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
86 mptable_lintsrc(mc, 0);
88 /* There is no extension information... */
90 /* Compute the checksums */
91 return mptable_finalize(mc);
94 unsigned long write_smp_table(unsigned long addr)
97 v = smp_write_floating_table(addr, 0);
98 return (unsigned long)smp_write_config_table(v);