2 #include <device/pci_def.h>
4 #include <device/pnp_def.h>
5 #include <arch/romcc_io.h>
8 #include <console/console.h>
9 #include "lib/ramtest.c"
10 #include "northbridge/via/vt8601/raminit.h"
11 #include "cpu/x86/mtrr/earlymtrr.c"
12 #include "cpu/x86/bist.h"
13 #include "pc80/udelay_io.c"
14 #include "lib/delay.c"
15 #include "lib/debug.c"
16 #include "southbridge/via/vt8231/vt8231_early_smbus.c"
17 #include "southbridge/via/vt8231/vt8231_early_serial.c"
18 #include "southbridge/via/vt8231/vt8231_enable_rom.c"
20 static inline int spd_read_byte(unsigned device, unsigned address)
22 return smbus_read_byte(device, address);
25 #include "northbridge/via/vt8601/raminit.c"
27 #include "lib/generic_sdram.c"
30 static void enable_mainboard_devices(void)
33 /* dev 0 for southbridge */
35 dev = pci_locate_device(PCI_ID(0x1106,0x8231), 0);
37 if (dev == PCI_DEV_INVALID) {
38 die("Southbridge not found!!!\n");
41 pci_write_config8(dev, 0x50, 7);
42 pci_write_config8(dev, 0x51, 0xff);
44 // This early setup switches IDE into compatibility mode before PCI gets
45 // a chance to assign I/Os
46 // movl $CONFIG_ADDR(0, 0x89, 0x42), %eax
49 // PCI_WRITE_CONFIG_BYTE
52 /* we do this here as in V2, we can not yet do raw operations
55 /* changed this to work correctly on later revisions of LB.
56 * The original dev += 0x100; stopped working. It also appears
57 * that if this is not set here, but in ide_init() only, the IDE
58 * does not work at all. I assume it needs to be set before something else,
59 * possibly before enabling the IDE peripheral, or it is a timing issue.
60 * Ben Hewson 29 Apr 2007.
63 dev = pci_locate_device(PCI_ID(0x1106,0x0571), 0);
64 pci_write_config8(dev, 0x42, 0);
67 static void enable_shadow_ram(void)
70 unsigned char shadowreg;
72 shadowreg = pci_read_config8(dev, 0x63);
75 pci_write_config8(dev, 0x63, shadowreg);
78 static void main(unsigned long bist)
83 enable_vt8231_serial();
87 /* Halt if there was a built in self test failure */
88 report_bist_failure(bist);
91 enable_mainboard_devices();
96 this is way more generic than we need.
97 sdram_initialize(ARRAY_SIZE(cpu), cpu);
99 sdram_set_registers((const struct mem_controller *) 0);
100 sdram_set_spd_registers((const struct mem_controller *) 0);
101 sdram_enable(0, (const struct mem_controller *) 0);
103 /* Check all of memory */
105 ram_check(0x00000000, msr.lo);
108 static const struct {
109 unsigned long lo, hi;
111 /* Check 16MB of memory @ 0*/
112 { 0x00000000, 0x01000000 },
114 /* Check 16MB of memory @ 2GB */
115 { 0x80000000, 0x81000000 },
119 for(i = 0; i < ARRAY_SIZE(check_addrs); i++) {
120 ram_check(check_addrs[i].lo, check_addrs[i].hi);