Use ACPI text fields consistently with all other boards
[coreboot.git] / src / mainboard / via / epia-m700 / fadt.c
1 /*
2  * ACPI - create the Fixed ACPI Description Tables (FADT)
3  *
4  * Copyright (C) 2004 Nick Barker <nick.barker9@btinternet.com>
5  * Copyright (C) 2009 One Laptop per Child, Association, Inc.
6  *
7  * This program is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU General Public License as
9  * published by the Free Software Foundation; either version 2 of
10  * the License, or (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20  */
21
22 #include <string.h>
23 #include <arch/acpi.h>
24 #include "northbridge/via/vx800/vx800.h"
25
26 void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt)
27 {
28         acpi_header_t *header = &(fadt->header);
29
30         memset((void *)fadt, 0, sizeof(acpi_fadt_t));
31         memcpy(header->signature, "FACP", 4);
32         header->length = 244;
33         header->revision = 3;
34         memcpy(header->oem_id, OEM_ID, 6);
35         memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
36         memcpy(header->asl_compiler_id, ASLC, 4);
37         header->asl_compiler_revision = 0;
38
39         fadt->firmware_ctrl = (u32)facs;
40         fadt->dsdt = (u32)dsdt;
41         fadt->preferred_pm_profile = 0;
42         fadt->sci_int = 0x9;
43
44         fadt->smi_cmd = VX800_ACPI_IO_BASE + 0x2F;
45         fadt->acpi_enable = 0xA1;
46         fadt->acpi_disable = 0xA0;
47
48         /*
49          * Value 42F,A1,A0, if we don't want SMI, then set them to zero.
50          * fadt->smi_cmd = 0x0;
51          * fadt->acpi_enable = 0x0;
52          * fadt->acpi_disable = 0x0;
53          */
54
55         fadt->s4bios_req = 0x0;
56         fadt->pstate_cnt = 0x0;
57
58         fadt->pm1a_evt_blk = VX800_ACPI_IO_BASE;
59         fadt->pm1b_evt_blk = 0x0;
60         fadt->pm1a_cnt_blk = VX800_ACPI_IO_BASE + 0x4;
61         fadt->pm1b_cnt_blk = 0x0;
62         fadt->pm2_cnt_blk = 0x22;       /* To support cpu-c3. */
63         /* fadt->pm2_cnt_blk = 0x0; */
64         fadt->pm_tmr_blk = VX800_ACPI_IO_BASE + 0x8;
65         fadt->gpe0_blk = VX800_ACPI_IO_BASE + 0x20;
66         fadt->gpe1_blk = VX800_ACPI_IO_BASE + 0x50;
67
68         fadt->pm1_evt_len = 4;
69         fadt->pm1_cnt_len = 2;
70         fadt->pm2_cnt_len = 1;  /* To support cpu-c3. */
71         /* fadt->pm2_cnt_len = 0; */
72
73         fadt->pm_tmr_len = 4;
74         fadt->gpe0_blk_len = 4;
75         fadt->gpe1_blk_len = 4;
76         fadt->gpe1_base = 0x10;
77         fadt->cst_cnt = 0;
78
79         fadt->p_lvl2_lat = 0x50;        /* This is the coreboot source. */
80         fadt->p_lvl3_lat = 0x320;
81         /* fadt->p_lvl2_lat = 0x80; */
82         /* fadt->p_lvl3_lat = 0x800; */
83         /* fadt->p_lvl2_lat = 0x1; */
84         /* fadt->p_lvl3_lat = 0x23; */
85
86         /* fadt->p_lvl2_lat = 0x200; */ /* Disable. */
87         /* fadt->p_lvl3_lat = 0x2000; */
88
89         fadt->flush_size = 0;
90         fadt->flush_stride = 0;
91         fadt->duty_offset = 0;
92         /* fadt->duty_width = 1; */
93         fadt->duty_width = 4;
94         fadt->day_alrm = 0x7d;
95         fadt->mon_alrm = 0x7e;
96         fadt->century = 0x32;
97         fadt->iapc_boot_arch = 0x0;
98         fadt->flags = 0xa5;
99
100         fadt->reset_reg.space_id = 0;
101         fadt->reset_reg.bit_width = 0;
102         fadt->reset_reg.bit_offset = 0;
103         fadt->reset_reg.resv = 0;
104         fadt->reset_reg.addrl = 0x0;
105         fadt->reset_reg.addrh = 0x0;
106
107         fadt->reset_value = 0;
108         fadt->x_firmware_ctl_l = (u32)facs;
109         fadt->x_firmware_ctl_h = 0;
110         fadt->x_dsdt_l = (u32)dsdt;
111         fadt->x_dsdt_h = 0;
112
113         fadt->x_pm1a_evt_blk.space_id = 1;
114         fadt->x_pm1a_evt_blk.bit_width = 4;
115         fadt->x_pm1a_evt_blk.bit_offset = 0;
116         fadt->x_pm1a_evt_blk.resv = 0;
117         fadt->x_pm1a_evt_blk.addrl = VX800_ACPI_IO_BASE;
118         fadt->x_pm1a_evt_blk.addrh = 0x0;
119
120         fadt->x_pm1b_evt_blk.space_id = 1;
121         fadt->x_pm1b_evt_blk.bit_width = 4;
122         fadt->x_pm1b_evt_blk.bit_offset = 0;
123         fadt->x_pm1b_evt_blk.resv = 0;
124         fadt->x_pm1b_evt_blk.addrl = 0x0;
125         fadt->x_pm1b_evt_blk.addrh = 0x0;
126
127         fadt->x_pm1a_cnt_blk.space_id = 1;
128         fadt->x_pm1a_cnt_blk.bit_width = 2;
129         fadt->x_pm1a_cnt_blk.bit_offset = 0;
130         fadt->x_pm1a_cnt_blk.resv = 0;
131         fadt->x_pm1a_cnt_blk.addrl = VX800_ACPI_IO_BASE + 0x4;
132         fadt->x_pm1a_cnt_blk.addrh = 0x0;
133
134         fadt->x_pm1b_cnt_blk.space_id = 1;
135         fadt->x_pm1b_cnt_blk.bit_width = 2;
136         fadt->x_pm1b_cnt_blk.bit_offset = 0;
137         fadt->x_pm1b_cnt_blk.resv = 0;
138         fadt->x_pm1b_cnt_blk.addrl = 0x0;
139         fadt->x_pm1b_cnt_blk.addrh = 0x0;
140
141         /* fadt->x_pm2_cnt_blk.space_id = 1; */
142         fadt->x_pm2_cnt_blk.space_id = 0;
143         fadt->x_pm2_cnt_blk.bit_width = 0;
144         fadt->x_pm2_cnt_blk.bit_offset = 0;
145         fadt->x_pm2_cnt_blk.resv = 0;
146         fadt->x_pm2_cnt_blk.addrl = 0x0;
147         fadt->x_pm2_cnt_blk.addrh = 0x0;
148
149         fadt->x_pm_tmr_blk.space_id = 1;
150         fadt->x_pm_tmr_blk.bit_width = 4;
151         fadt->x_pm_tmr_blk.bit_offset = 0;
152         fadt->x_pm_tmr_blk.resv = 0;
153         fadt->x_pm_tmr_blk.addrl = VX800_ACPI_IO_BASE + 0x8;
154         fadt->x_pm_tmr_blk.addrh = 0x0;
155
156         fadt->x_gpe0_blk.space_id = 1;
157         fadt->x_gpe0_blk.bit_width = 0;
158         fadt->x_gpe0_blk.bit_offset = 0;
159         fadt->x_gpe0_blk.resv = 0;
160         fadt->x_gpe0_blk.addrl = VX800_ACPI_IO_BASE + 0x20;
161         fadt->x_gpe0_blk.addrh = 0x0;
162
163         fadt->x_gpe1_blk.space_id = 1;
164         fadt->x_gpe1_blk.bit_width = 0;
165         fadt->x_gpe1_blk.bit_offset = 0;
166         fadt->x_gpe1_blk.resv = 0;
167         fadt->x_gpe1_blk.addrl = 0x0;
168         fadt->x_gpe1_blk.addrh = 0x0;
169
170         header->checksum = acpi_checksum((void *)fadt, sizeof(acpi_fadt_t));
171 }