nvidia/mcp55: Move HAVE_HARD_RESET to southbridge
[coreboot.git] / src / mainboard / tyan / s2912_fam10 / Kconfig
1 if BOARD_TYAN_S2912_FAM10
2
3 config BOARD_SPECIFIC_OPTIONS # dummy
4         def_bool y
5         select ARCH_X86
6         select CPU_AMD_SOCKET_F_1207
7         select DIMM_DDR2
8         select DIMM_REGISTERED
9         select NORTHBRIDGE_AMD_AMDFAM10
10         select SOUTHBRIDGE_NVIDIA_MCP55
11         select MCP55_USE_NIC
12         select SUPERIO_WINBOND_W83627HF
13         select HAVE_BUS_CONFIG
14         select HAVE_OPTION_TABLE
15         select HAVE_PIRQ_TABLE
16         select HAVE_MP_TABLE
17         select LIFT_BSP_APIC_ID
18         select BOARD_ROMSIZE_KB_1024
19         select RAMINIT_SYSINFO
20         select ENABLE_APIC_EXT_ID
21         select AMDMCT
22         select MMCONF_SUPPORT_DEFAULT
23         select QRANK_DIMM_SUPPORT
24
25 config MAINBOARD_DIR
26         string
27         default tyan/s2912_fam10
28
29 config DCACHE_RAM_BASE
30         hex
31         default 0xc4000
32
33 config DCACHE_RAM_SIZE
34         hex
35         default 0x0c000
36
37 config DCACHE_RAM_GLOBAL_VAR_SIZE
38         hex
39         default 0x04000
40
41 config APIC_ID_OFFSET
42         hex
43         default 0
44
45 config MEM_TRAIN_SEQ
46         int
47         default 2
48
49 config SB_HT_CHAIN_ON_BUS0
50         int
51         default 2
52
53 config MAINBOARD_PART_NUMBER
54         string
55         default "S2912 (Fam10)"
56
57 config PCI_64BIT_PREF_MEM
58         bool
59         default n
60
61 config MAX_CPUS
62         int
63         default 12
64
65 config MAX_PHYSICAL_CPUS
66         int
67         default 2
68
69 config HT_CHAIN_UNITID_BASE
70         hex
71         default 0x1
72
73 config HT_CHAIN_END_UNITID_BASE
74         hex
75         default 0x20
76
77 config SERIAL_CPU_INIT
78         bool
79         default n
80
81 config IRQ_SLOT_COUNT
82         int
83         default 11
84
85 config AMD_UCODE_PATCH_FILE
86         string
87         default "mc_patch_01000095.h"
88
89 config RAMBASE
90         hex
91         default 0x200000
92
93 config RAMTOP
94         hex
95         default 0x1000000
96
97 config HEAP_SIZE
98         hex
99         default 0xc0000
100
101 config MCP55_PCI_E_X_0
102         int
103         default 1
104
105 endif # BOARD_TYAN_S2912_FAM10