Move "select CACHE_AS_RAM" lines from boards into CPU socket.
[coreboot.git] / src / mainboard / tyan / s2912_fam10 / Kconfig
1 if BOARD_TYAN_S2912_FAM10
2
3 config BOARD_SPECIFIC_OPTIONS # dummy
4         def_bool y
5         select ARCH_X86
6         select CPU_AMD_SOCKET_F_1207
7         select DIMM_DDR2
8         select DIMM_REGISTERED
9         select NORTHBRIDGE_AMD_AMDFAM10
10         select SOUTHBRIDGE_NVIDIA_MCP55
11         select MCP55_USE_NIC
12         select SUPERIO_WINBOND_W83627HF
13         select HAVE_BUS_CONFIG
14         select HAVE_OPTION_TABLE
15         select HAVE_PIRQ_TABLE
16         select HAVE_MP_TABLE
17         select HAVE_HARD_RESET
18         select LIFT_BSP_APIC_ID
19         select BOARD_ROMSIZE_KB_1024
20         select RAMINIT_SYSINFO
21         select ENABLE_APIC_EXT_ID
22         select AMDMCT
23         select TINY_BOOTBLOCK
24         select MMCONF_SUPPORT_DEFAULT
25         select QRANK_DIMM_SUPPORT
26
27 config MAINBOARD_DIR
28         string
29         default tyan/s2912_fam10
30
31 config DCACHE_RAM_BASE
32         hex
33         default 0xc4000
34
35 config DCACHE_RAM_SIZE
36         hex
37         default 0x0c000
38
39 config DCACHE_RAM_GLOBAL_VAR_SIZE
40         hex
41         default 0x04000
42
43 config APIC_ID_OFFSET
44         hex
45         default 0
46
47 config MEM_TRAIN_SEQ
48         int
49         default 2
50
51 config SB_HT_CHAIN_ON_BUS0
52         int
53         default 2
54
55 config MAINBOARD_PART_NUMBER
56         string
57         default "S2912 (Fam10)"
58
59 config PCI_64BIT_PREF_MEM
60         bool
61         default n
62
63 config MAX_CPUS
64         int
65         default 12
66
67 config MAX_PHYSICAL_CPUS
68         int
69         default 2
70
71 config HT_CHAIN_UNITID_BASE
72         hex
73         default 0x1
74
75 config HT_CHAIN_END_UNITID_BASE
76         hex
77         default 0x20
78
79 config SERIAL_CPU_INIT
80         bool
81         default n
82
83 config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
84         hex
85         default 0x2912
86
87 config IRQ_SLOT_COUNT
88         int
89         default 11
90
91 config AMD_UCODE_PATCH_FILE
92         string
93         default "mc_patch_01000095.h"
94
95 config RAMBASE
96         hex
97         default 0x200000
98
99 config RAMTOP
100         hex
101         default 0x1000000
102
103 config HEAP_SIZE
104         hex
105         default 0xc0000
106
107 config MCP55_PCI_E_X_0
108         int
109         default 1
110
111 endif # BOARD_TYAN_S2912_FAM10