1 #include <console/console.h>
2 #include <arch/smp/mpspec.h>
3 #include <device/pci.h>
7 #include <cpu/amd/amdk8_sysconf.h>
9 extern unsigned char bus_isa;
10 extern unsigned char bus_ck804_0; //1
11 extern unsigned char bus_ck804_1; //2
12 extern unsigned char bus_ck804_2; //3
13 extern unsigned char bus_ck804_3; //4
14 extern unsigned char bus_ck804_4; //5
15 extern unsigned char bus_ck804_5; //6
16 extern unsigned char bus_8131_0; //7
17 extern unsigned char bus_8131_1; //8
18 extern unsigned char bus_8131_2; //9
19 extern unsigned char bus_ck804b_0;//a
20 extern unsigned char bus_ck804b_1;//b
21 extern unsigned char bus_ck804b_2;//c
22 extern unsigned char bus_ck804b_3;//d
23 extern unsigned char bus_ck804b_4;//e
24 extern unsigned char bus_ck804b_5;//f
25 extern unsigned apicid_ck804;
26 extern unsigned apicid_8131_1;
27 extern unsigned apicid_8131_2;
28 extern unsigned apicid_ck804b;
30 extern unsigned sbdn3;
31 extern unsigned sbdnb;
35 static void *smp_write_config_table(void *v)
37 static const char sig[4] = "PCMP";
38 static const char oem[8] = "COREBOOT";
39 static const char productid[12] = "S2895 ";
40 struct mp_config_table *mc;
43 unsigned char bus_num;
46 mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
47 memset(mc, 0, sizeof(*mc));
49 memcpy(mc->mpc_signature, sig, sizeof(sig));
50 mc->mpc_length = sizeof(*mc); /* initially just the header */
52 mc->mpc_checksum = 0; /* not yet computed */
53 memcpy(mc->mpc_oem, oem, sizeof(oem));
54 memcpy(mc->mpc_productid, productid, sizeof(productid));
57 mc->mpc_entry_count = 0; /* No entries yet... */
58 mc->mpc_lapic = LAPIC_ADDR;
63 smp_write_processors(mc);
69 /* define bus and isa numbers */
70 for(bus_num = 0; bus_num < bus_isa; bus_num++) {
71 smp_write_bus(mc, bus_num, "PCI ");
73 smp_write_bus(mc, bus_isa, "ISA ");
75 /*I/O APICs: APIC ID Version State Address*/
81 dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn+ 0x1,0));
83 res = find_resource(dev, PCI_BASE_ADDRESS_1);
85 smp_write_ioapic(mc, apicid_ck804, 0x11, res->base);
88 /* Initialize interrupt mapping*/
91 pci_write_config32(dev, 0x7c, dword);
94 pci_write_config32(dev, 0x80, dword);
97 pci_write_config32(dev, 0x84, dword);
101 dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3,1));
103 res = find_resource(dev, PCI_BASE_ADDRESS_0);
105 smp_write_ioapic(mc, apicid_8131_1, 0x11, res->base);
108 dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3+1,1));
110 res = find_resource(dev, PCI_BASE_ADDRESS_0);
112 smp_write_ioapic(mc, apicid_8131_2, 0x11, res->base);
116 if(sysconf.pci1234[2] & 0xf) {
117 dev = dev_find_slot(bus_ck804b_0, PCI_DEVFN(sbdnb + 0x1,0));
119 res = find_resource(dev, PCI_BASE_ADDRESS_1);
121 smp_write_ioapic(mc, apicid_ck804b, 0x11, res->base);
124 dword = 0x0000d218; // Why does the factory BIOS have 0?
125 pci_write_config32(dev, 0x7c, dword);
128 pci_write_config32(dev, 0x80, dword);
130 dword = 0x00000d00; // Same here.
131 pci_write_config32(dev, 0x84, dword);
138 mptable_add_isa_interrupts(mc, bus_isa, apicid_ck804, 1);
140 /*I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
141 // Onboard ck804 smbus
142 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((sbdn+1)<<2)|1, apicid_ck804, 0xa);
145 // Onboard ck804 USB 1.1
146 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((sbdn+2)<<2)|0, apicid_ck804, 0x15); // 21
148 // Onboard ck804 USB 2
149 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((sbdn+2)<<2)|1, apicid_ck804, 0x14); // 20
151 // Onboard ck804 Audio
152 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((sbdn+4)<<2)|0, apicid_ck804, 0x14); // 20
154 // Onboard ck804 SATA 0
155 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((sbdn +7)<<2)|0, apicid_ck804, 0x17); // 23
157 // Onboard ck804 SATA 1
158 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((sbdn +8)<<2)|0, apicid_ck804, 0x16); // 22
161 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((sbdn +0x0a)<<2)|0, apicid_ck804, 0x15); // 21
165 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_5, (0x00<<2)|i, apicid_ck804, 0x10 + (2+i+4-sbdn%4)%4);
169 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_1, (0x05<<2)|0, apicid_ck804, 0x13); // 19
173 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_1, (0x04<<2)|i, apicid_ck804, 0x10 + (0+i)%4); //16
176 if(sysconf.pci1234[2] & 0xf) {
178 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804b_0, ((sbdnb+0x0a)<<2)|0, apicid_ck804b, 0x15);//24+4+4+21=53
182 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804b_5, (0x00<<2)|i, apicid_ck804b, 0x10 + (2+i+4-sbdnb%4)%4);
188 //Slot 4 PCI-X 100/66
190 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (4<<2)|i, apicid_8131_2, (0+i)%4);
195 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (9<<2)|i, apicid_8131_2, (1+i)%4); // 29
200 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (6<<2)|i, apicid_8131_2, (2+i)%4); //30
205 //Slot 6 PCIX 133/100/66
207 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (4<<2)|i, apicid_8131_1, (0+i)%4); //24
210 /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
211 smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
212 smp_write_intsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
213 /* There is no extension information... */
215 /* Compute the checksums */
216 mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
217 mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);
218 printk(BIOS_DEBUG, "Wrote the mp table end at: %p - %p\n",
219 mc, smp_next_mpe_entry(mc));
220 return smp_next_mpe_entry(mc);
223 unsigned long write_smp_table(unsigned long addr)
226 v = smp_write_floating_table(addr);
227 return (unsigned long)smp_write_config_table(v);