1 uses CONFIG_GENERATE_MP_TABLE
2 uses CONFIG_GENERATE_PIRQ_TABLE
3 uses CONFIG_USE_FALLBACK_IMAGE
4 uses CONFIG_HAVE_FALLBACK_BOOT
5 uses CONFIG_HAVE_HARD_RESET
6 uses CONFIG_IRQ_SLOT_COUNT
7 uses CONFIG_HAVE_OPTION_TABLE
9 uses CONFIG_MAX_PHYSICAL_CPUS
10 uses CONFIG_LOGICAL_CPUS
13 uses CONFIG_FALLBACK_SIZE
15 uses CONFIG_ROM_SECTION_SIZE
16 uses CONFIG_ROM_IMAGE_SIZE
17 uses CONFIG_ROM_SECTION_SIZE
18 uses CONFIG_ROM_SECTION_OFFSET
19 uses CONFIG_ROM_PAYLOAD
20 uses CONFIG_COMPRESSED_PAYLOAD_LZMA
21 uses CONFIG_PRECOMPRESSED_PAYLOAD
23 uses CONFIG_XIP_ROM_SIZE
24 uses CONFIG_XIP_ROM_BASE
25 uses CONFIG_STACK_SIZE
27 uses CONFIG_USE_OPTION_TABLE
28 uses CONFIG_LB_CKS_RANGE_START
29 uses CONFIG_LB_CKS_RANGE_END
30 uses CONFIG_LB_CKS_LOC
31 uses CONFIG_GENERATE_ACPI_TABLES
32 uses CONFIG_HAVE_ACPI_RESUME
33 uses CONFIG_HAVE_LOW_TABLES
35 uses CONFIG_HAVE_SMI_HANDLER
37 uses CONFIG_MAINBOARD_PART_NUMBER
38 uses CONFIG_MAINBOARD_VENDOR
39 uses CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
40 uses CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
41 uses COREBOOT_EXTRA_VERSION
44 uses CONFIG_CROSS_COMPILE
48 uses CONFIG_TTYS0_BAUD
49 uses CONFIG_TTYS0_BASE
51 uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL
52 uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL
53 uses CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL
54 uses CONFIG_CONSOLE_SERIAL8250
55 uses CONFIG_CONSOLE_BTEXT
56 uses CONFIG_HAVE_INIT_TIMER
58 uses CONFIG_CONSOLE_VGA
59 uses CONFIG_VGA_ROM_RUN
60 uses CONFIG_PCI_ROM_RUN
61 uses CONFIG_HW_MEM_HOLE_SIZEK
63 uses CONFIG_USE_DCACHE_RAM
64 uses CONFIG_DCACHE_RAM_BASE
65 uses CONFIG_DCACHE_RAM_SIZE
67 uses CONFIG_USE_PRINTK_IN_CAR
69 uses CONFIG_HT_CHAIN_UNITID_BASE
70 uses CONFIG_HT_CHAIN_END_UNITID_BASE
71 uses CONFIG_SB_HT_CHAIN_ON_BUS0
72 uses CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY
74 uses CONFIG_ID_SECTION_OFFSET
76 ## CONFIG_ROM_SIZE is the size of boot ROM that this board will use.
77 default CONFIG_ROM_SIZE=1024*1024
80 ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use
82 default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE
89 ## Build code for the fallback boot
91 default CONFIG_HAVE_FALLBACK_BOOT=1
94 ## Build code to reset the motherboard from coreboot
96 default CONFIG_HAVE_HARD_RESET=1
101 default CONFIG_HAVE_SMI_HANDLER=0
104 ## Build code to export a programmable irq routing table
106 default CONFIG_GENERATE_PIRQ_TABLE=1
107 default CONFIG_IRQ_SLOT_COUNT=11
110 ## Build code to export an x86 MP table
111 ## Useful for specifying IRQ routing values
113 default CONFIG_GENERATE_MP_TABLE=1
116 ## Build code to provide ACPI support
118 default CONFIG_GENERATE_ACPI_TABLES=1
119 default CONFIG_HAVE_LOW_TABLES=1
120 default CONFIG_MULTIBOOT=0
123 ## Build code to export a CMOS option table
125 default CONFIG_HAVE_OPTION_TABLE=1
128 ## Move the default coreboot cmos range off of AMD RTC registers
130 default CONFIG_LB_CKS_RANGE_START=49
131 default CONFIG_LB_CKS_RANGE_END=122
132 default CONFIG_LB_CKS_LOC=123
135 default CONFIG_CONSOLE_VGA=1
136 default CONFIG_PCI_ROM_RUN=1
137 default CONFIG_VGA_ROM_RUN=1
140 ## Build code for SMP support
141 ## Only worry about 2 micro processors
144 default CONFIG_MAX_CPUS=4
145 default CONFIG_MAX_PHYSICAL_CPUS=2
146 default CONFIG_LOGICAL_CPUS=1
149 default CONFIG_HW_MEM_HOLE_SIZEK=0x100000
151 ##HT Unit ID offset, default is 1, the typical one
152 default CONFIG_HT_CHAIN_UNITID_BASE=0x0
154 ##real SB Unit ID, default is 0x20, mean dont touch it at last
155 #default CONFIG_HT_CHAIN_END_UNITID_BASE=0x0
157 #make the SB HT chain on bus 0, default is not (0)
158 default CONFIG_SB_HT_CHAIN_ON_BUS0=2
160 ##only offset for SB chain?, default is yes(1)
161 default CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY=0
164 #default CONFIG_CONSOLE_BTEXT=1
167 default CONFIG_CONSOLE_VGA=1
168 default CONFIG_PCI_ROM_RUN=1
171 ## enable CACHE_AS_RAM specifics
173 default CONFIG_USE_DCACHE_RAM=1
174 default CONFIG_DCACHE_RAM_BASE=0xcf000
175 default CONFIG_DCACHE_RAM_SIZE=0x1000
176 default CONFIG_USE_INIT=0
180 ## Build code to setup a generic IOAPIC
182 default CONFIG_IOAPIC=1
185 ## Clean up the motherboard id strings
187 default CONFIG_MAINBOARD_PART_NUMBER="s2892"
188 default CONFIG_MAINBOARD_VENDOR="Tyan"
189 default CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x10f1
190 default CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x2892
193 ### coreboot layout values
196 ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy.
197 default CONFIG_ROM_IMAGE_SIZE = 65536
200 ## Use a small 8K stack
202 default CONFIG_STACK_SIZE=0x2000
205 ## Use a small 16K heap
207 default CONFIG_HEAP_SIZE=0x4000
210 ## Only use the option table in a normal image
212 default CONFIG_USE_OPTION_TABLE = !CONFIG_USE_FALLBACK_IMAGE
215 ## Coreboot C code runs at this location in RAM
217 default CONFIG_RAMBASE=0x00004000
220 ## Load the payload from the ROM
222 default CONFIG_ROM_PAYLOAD = 1
225 ### Defaults of options that you may want to override in the target config file
229 ## The default compiler
231 default CC="$(CONFIG_CROSS_COMPILE)gcc -m32"
235 ## Disable the gdb stub by default
237 default CONFIG_GDB_STUB=0
239 default CONFIG_USE_PRINTK_IN_CAR=1
242 ## The Serial Console
245 # To Enable the Serial Console
246 default CONFIG_CONSOLE_SERIAL8250=1
248 ## Select the serial console baud rate
249 default CONFIG_TTYS0_BAUD=115200
250 #default CONFIG_TTYS0_BAUD=57600
251 #default CONFIG_TTYS0_BAUD=38400
252 #default CONFIG_TTYS0_BAUD=19200
253 #default CONFIG_TTYS0_BAUD=9600
254 #default CONFIG_TTYS0_BAUD=4800
255 #default CONFIG_TTYS0_BAUD=2400
256 #default CONFIG_TTYS0_BAUD=1200
258 # Select the serial console base port
259 default CONFIG_TTYS0_BASE=0x3f8
261 # Select the serial protocol
262 # This defaults to 8 data bits, 1 stop bit, and no parity
263 default CONFIG_TTYS0_LCS=0x3
266 ### Select the coreboot loglevel
268 ## EMERG 1 system is unusable
269 ## ALERT 2 action must be taken immediately
270 ## CRIT 3 critical conditions
271 ## ERR 4 error conditions
272 ## WARNING 5 warning conditions
273 ## NOTICE 6 normal but significant condition
274 ## INFO 7 informational
275 ## CONFIG_DEBUG 8 debug-level messages
276 ## SPEW 9 Way too many details
278 ## Request this level of debugging output
279 default CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
280 ## At a maximum only compile in this level of debugging
281 default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
284 ## Select power on after power fail setting
285 default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
287 default CONFIG_ID_SECTION_OFFSET=0x80