3 uses USE_FALLBACK_IMAGE
4 uses HAVE_FALLBACK_BOOT
9 uses CONFIG_MAX_PHYSICAL_CPUS
10 uses CONFIG_LOGICAL_CPUS
18 uses ROM_SECTION_OFFSET
19 uses CONFIG_ROM_STREAM
20 uses CONFIG_ROM_STREAM_START
28 uses LB_CKS_RANGE_START
31 uses MAINBOARD_PART_NUMBER
34 uses MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
35 uses MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
36 uses LINUXBIOS_EXTRA_VERSION
46 uses DEFAULT_CONSOLE_LOGLEVEL
47 uses MAXIMUM_CONSOLE_LOGLEVEL
48 uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL
49 uses CONFIG_CONSOLE_SERIAL8250
50 uses CONFIG_CONSOLE_BTEXT
54 uses CONFIG_CONSOLE_VGA
55 uses CONFIG_PCI_ROM_RUN
56 uses K8_HW_MEM_HOLE_SIZEK
57 uses K8_HT_FREQ_1G_SUPPORT
64 uses HT_CHAIN_UNITID_BASE
65 uses HT_CHAIN_END_UNITID_BASE
66 uses K8_SB_HT_CHAIN_ON_BUS0
67 uses SB_HT_CHAIN_UNITID_OFFSET_ONLY
69 ## ROM_SIZE is the size of boot ROM that this board will use.
71 #default ROM_SIZE=524288
74 default ROM_SIZE=1048576
78 ## FALLBACK_SIZE is the amount of the ROM the complete fallback image will use
80 #default FALLBACK_SIZE=131072
82 default FALLBACK_SIZE=0x40000
89 ## Build code for the fallback boot
91 default HAVE_FALLBACK_BOOT=1
94 ## Build code to reset the motherboard from linuxBIOS
96 default HAVE_HARD_RESET=1
99 ## Build code to export a programmable irq routing table
101 default HAVE_PIRQ_TABLE=1
102 default IRQ_SLOT_COUNT=11
105 ## Build code to export an x86 MP table
106 ## Useful for specifying IRQ routing values
108 default HAVE_MP_TABLE=1
111 ## Build code to export a CMOS option table
113 default HAVE_OPTION_TABLE=1
116 ## Move the default LinuxBIOS cmos range off of AMD RTC registers
118 default LB_CKS_RANGE_START=49
119 default LB_CKS_RANGE_END=122
120 default LB_CKS_LOC=123
123 ## Build code for SMP support
124 ## Only worry about 2 micro processors
127 default CONFIG_MAX_CPUS=4
128 default CONFIG_MAX_PHYSICAL_CPUS=2
129 default CONFIG_LOGICAL_CPUS=1
132 default K8_HW_MEM_HOLE_SIZEK=0x100000
134 #Opteron K8 1G HT Support
135 default K8_HT_FREQ_1G_SUPPORT=1
137 ##HT Unit ID offset, default is 1, the typical one
138 default HT_CHAIN_UNITID_BASE=0x0
140 ##real SB Unit ID, default is 0x20, mean dont touch it at last
141 #default HT_CHAIN_END_UNITID_BASE=0x0
143 #make the SB HT chain on bus 0, default is not (0)
144 default K8_SB_HT_CHAIN_ON_BUS0=2
146 ##only offset for SB chain?, default is yes(1)
147 default SB_HT_CHAIN_UNITID_OFFSET_ONLY=0
150 #default CONFIG_CONSOLE_BTEXT=1
153 default CONFIG_CONSOLE_VGA=1
154 default CONFIG_PCI_ROM_RUN=1
157 ## enable CACHE_AS_RAM specifics
159 default USE_DCACHE_RAM=1
160 default DCACHE_RAM_BASE=0xcf000
161 default DCACHE_RAM_SIZE=0x1000
162 default CONFIG_USE_INIT=0
165 ## Build code to setup a generic IOAPIC
167 default CONFIG_IOAPIC=1
170 ## Clean up the motherboard id strings
172 default MAINBOARD_PART_NUMBER="s2892"
173 default MAINBOARD_VENDOR="Tyan"
174 default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x10f1
175 default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x2892
178 ### LinuxBIOS layout values
181 ## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
182 default ROM_IMAGE_SIZE = 65536
185 ## Use a small 8K stack
187 default STACK_SIZE=0x2000
190 ## Use a small 16K heap
192 default HEAP_SIZE=0x4000
195 ## Only use the option table in a normal image
197 default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
200 ## LinuxBIOS C code runs at this location in RAM
202 default _RAMBASE=0x00004000
205 ## Load the payload from the ROM
207 default CONFIG_ROM_STREAM = 1
210 ### Defaults of options that you may want to override in the target config file
214 ## The default compiler
216 default CC="$(CROSS_COMPILE)gcc -m32"
220 ## Disable the gdb stub by default
222 default CONFIG_GDB_STUB=0
225 ## The Serial Console
228 # To Enable the Serial Console
229 default CONFIG_CONSOLE_SERIAL8250=1
231 ## Select the serial console baud rate
232 default TTYS0_BAUD=115200
233 #default TTYS0_BAUD=57600
234 #default TTYS0_BAUD=38400
235 #default TTYS0_BAUD=19200
236 #default TTYS0_BAUD=9600
237 #default TTYS0_BAUD=4800
238 #default TTYS0_BAUD=2400
239 #default TTYS0_BAUD=1200
241 # Select the serial console base port
242 default TTYS0_BASE=0x3f8
244 # Select the serial protocol
245 # This defaults to 8 data bits, 1 stop bit, and no parity
246 default TTYS0_LCS=0x3
249 ### Select the linuxBIOS loglevel
251 ## EMERG 1 system is unusable
252 ## ALERT 2 action must be taken immediately
253 ## CRIT 3 critical conditions
254 ## ERR 4 error conditions
255 ## WARNING 5 warning conditions
256 ## NOTICE 6 normal but significant condition
257 ## INFO 7 informational
258 ## DEBUG 8 debug-level messages
259 ## SPEW 9 Way too many details
261 ## Request this level of debugging output
262 default DEFAULT_CONSOLE_LOGLEVEL=8
263 ## At a maximum only compile in this level of debugging
264 default MAXIMUM_CONSOLE_LOGLEVEL=8
267 ## Select power on after power fail setting
268 default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"