src/mainboard/tyan/s2891/mptable.c

   1 #include <console/console.h>
   2 #include <arch/smp/mpspec.h>
   3 #include <device/pci.h>
   4 #include <string.h>
   5 #include <stdint.h>
   6
   7 void *smp_write_config_table(void *v)
   8 {
   9         static const char sig[4] = "PCMP";
  10         static const char oem[8] = "TYAN    ";
  11         static const char productid[12] = "S2891       ";
  12         struct mp_config_table *mc;
  13
  14         unsigned char bus_num;
  15         unsigned char bus_isa;
  16         unsigned char bus_ck804_0; //1
  17         unsigned char bus_ck804_1; //2
  18         unsigned char bus_ck804_2; //3
  19         unsigned char bus_ck804_3; //4
  20         unsigned char bus_ck804_4; //5
  21         unsigned char bus_ck804_5; //6
  22         unsigned char bus_8131_0;  //7
  23         unsigned char bus_8131_1;  //8
  24         unsigned char bus_8131_2;  //9
  25         unsigned apicid_base;
  26         unsigned apicid_ck804;
  27         unsigned apicid_8131_1;
  28         unsigned apicid_8131_2;
  29
  30         mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
  31         memset(mc, 0, sizeof(*mc));
  32
  33         memcpy(mc->mpc_signature, sig, sizeof(sig));
  34         mc->mpc_length = sizeof(*mc); /* initially just the header */
  35         mc->mpc_spec = 0x04;
  36         mc->mpc_checksum = 0; /* not yet computed */
  37         memcpy(mc->mpc_oem, oem, sizeof(oem));
  38         memcpy(mc->mpc_productid, productid, sizeof(productid));
  39         mc->mpc_oemptr = 0;
  40         mc->mpc_oemsize = 0;
  41         mc->mpc_entry_count = 0; /* No entries yet... */
  42         mc->mpc_lapic = LAPIC_ADDR;
  43         mc->mpe_length = 0;
  44         mc->mpe_checksum = 0;
  45         mc->reserved = 0;
  46
  47         smp_write_processors(mc);
  48
  49        {
  50                 device_t dev;
  51
  52
  53                 /* CK804 */
  54                 bus_ck804_0 = 1;
  55                 dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(CK804_DEVN_BASE + 0x09,0));
  56                 if (dev) {
  57                         bus_ck804_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
  58                         bus_ck804_4 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
  59                         bus_ck804_4++;
  60                 }
  61                 else {
  62                         printk_debug("ERROR - could not find PCI 1:%02x.0, using defaults\n", CK804_DEVN_BASE + 0x09);
  63
  64                         bus_ck804_1 = 2;
  65                         bus_ck804_4 = 3;
  66
  67                 }
  68                 dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(CK804_DEVN_BASE + 0x0d,0));
  69                 if (dev) {
  70                         bus_ck804_4 = pci_read_config8(dev, PCI_SECONDARY_BUS);
  71                         bus_ck804_5 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
  72                         bus_ck804_5++;
  73                 }
  74                 else {
  75                         printk_debug("ERROR - could not find PCI 1:%02x.0, using defaults\n",CK804_DEVN_BASE + 0x0d);
  76
  77                         bus_ck804_5 = bus_ck804_4+1;
  78                 }
  79
  80                 dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(CK804_DEVN_BASE + 0x0e,0));
  81                 if (dev) {
  82                         bus_ck804_5 = pci_read_config8(dev, PCI_SECONDARY_BUS);
  83                         bus_8131_0 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
  84                         bus_8131_0++;
  85                 }
  86                 else {
  87                         printk_debug("ERROR - could not find PCI 1:%02x.0, using defaults\n",CK804_DEVN_BASE + 0x0e);
  88
  89                         bus_8131_0 = bus_ck804_5+1;
  90                 }
  91
  92                 /* 8131-1 */
  93                 dev = dev_find_slot(bus_8131_0, PCI_DEVFN(0x01,0));
  94                 if (dev) {
  95                         bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
  96                         bus_8131_2 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
  97                         bus_8131_2++;
  98                 }
  99                 else {
 100                         printk_debug("ERROR - could not find PCI %02x:01.0, using defaults\n", bus_8131_0);
 101
 102                         bus_8131_1 = bus_8131_0+1;
 103                         bus_8131_2 = bus_8131_0+2;
 104                 }
 105                 /* 8131-2 */
 106                 dev = dev_find_slot(bus_8131_0, PCI_DEVFN(0x02,0));
 107                 if (dev) {
 108                         bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
 109                         bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
 110                         bus_isa++;
 111                 }
 112                 else {
 113                         printk_debug("ERROR - could not find PCI %02x:02.0, using defaults\n", bus_8131_0);
 114
 115                         bus_8131_2 = bus_8131_1+1;
 116                         bus_isa = bus_8131_1+2;
 117                 }
 118
 119         }
 120
 121
 122
 123 /*Bus:          Bus ID  Type*/
 124        /* define bus and isa numbers */
 125         for(bus_num = 0; bus_num < bus_isa; bus_num++) {
 126                 smp_write_bus(mc, bus_num, "PCI   ");
 127         }
 128         smp_write_bus(mc, bus_isa, "ISA   ");
 129
 130 /*I/O APICs:    APIC ID Version State           Address*/
 131         apicid_base = CONFIG_MAX_CPUS;
 132         apicid_ck804 = apicid_base;
 133         apicid_8131_1 = apicid_base+1;
 134         apicid_8131_2 = apicid_base+2;
 135 //      smp_write_ioapic(mc, 2, 0x11, 0xfec00000);
 136         {
 137                 device_t dev;
 138                 struct resource *res;
 139                 uint32_t dword;
 140
 141                 dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(CK804_DEVN_BASE+ 0x1,0));
 142                 if (dev) {
 143                         res = find_resource(dev, PCI_BASE_ADDRESS_1);
 144                         if (res) {
 145                                 smp_write_ioapic(mc, apicid_ck804, 0x11, res->base);
 146                         }
 147
 148
 149                         dword = 0x0000d218;
 150                         pci_write_config32(dev, 0x7c, dword);
 151
 152                         dword = 0x8d001a00;
 153
 154
 155                         pci_write_config32(dev, 0x80, dword);
 156
 157                         dword = 0x00000072;
 158
 159                         pci_write_config32(dev, 0x84, dword);
 160
 161                 }
 162
 163                 dev = dev_find_slot(bus_8131_0, PCI_DEVFN(0x1,1));
 164                 if (dev) {
 165                         res = find_resource(dev, PCI_BASE_ADDRESS_0);
 166                         if (res) {
 167                                 smp_write_ioapic(mc, apicid_8131_1, 0x11, res->base);
 168                         }
 169                 }
 170                 dev = dev_find_slot(bus_8131_0, PCI_DEVFN(0x2,1));
 171                 if (dev) {
 172                         res = find_resource(dev, PCI_BASE_ADDRESS_0);
 173                         if (res) {
 174                                 smp_write_ioapic(mc, apicid_8131_2, 0x11, res->base);
 175                         }
 176                 }
 177
 178         }
 179
 180 /*I/O Ints:     Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN#
 181 */      smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_ck804, 0x0);
 182         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x1, apicid_ck804, 0x1);
 183         smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x0, apicid_ck804, 0x2);
 184         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x3, apicid_ck804, 0x3);
 185         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x4, apicid_ck804, 0x4);
 186         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x6, apicid_ck804, 0x6);
 187         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x7, apicid_ck804, 0x7);
 188         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x8, apicid_ck804, 0x8);
 189         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0xc, apicid_ck804, 0xc);
 190         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0xd, apicid_ck804, 0xd);
 191         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0xe, apicid_ck804, 0xe);
 192         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0xf, apicid_ck804, 0xf);
 193
 194         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((CK804_DEVN_BASE+1)<<2)|1, apicid_ck804, 0xa);
 195
 196         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((CK804_DEVN_BASE+2)<<2)|0, apicid_ck804, 0x16);
 197
 198         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((CK804_DEVN_BASE+2)<<2)|1, apicid_ck804, 0x17);
 199
 200         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((CK804_DEVN_BASE +7)<<2)|0, apicid_ck804, 0x14);
 201
 202         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((CK804_DEVN_BASE +8)<<2)|0, apicid_ck804, 0x15);
 203
 204 #if 1
 205         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_5, (0x00<<2)|0, apicid_ck804, 0x12); //
 206         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_5, (0x00<<2)|1, apicid_ck804, 0x13); //
 207         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_5, (0x00<<2)|2, apicid_ck804, 0x10); //
 208         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_5, (0x00<<2)|3, apicid_ck804, 0x11); //
 209 #endif
 210
 211 #if 1
 212         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_4, (0x00<<2)|0, apicid_ck804, 0x11); //
 213         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_4, (0x00<<2)|1, apicid_ck804, 0x12); //
 214         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_4, (0x00<<2)|2, apicid_ck804, 0x13); //
 215         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_4, (0x00<<2)|3, apicid_ck804, 0x10); //
 216 #endif
 217
 218         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_1, (7<<2)|0, apicid_ck804, 0x13); //
 219
 220         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (9<<2)|0, apicid_8131_2, 0x0); //
 221         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (9<<2)|1, apicid_8131_2, 0x1);
 222
 223         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (8<<2)|0, apicid_8131_1, 0x0); //
 224         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (8<<2)|1, apicid_8131_1, 0x1);//
 225         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (8<<2)|2, apicid_8131_1, 0x2);//
 226         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (8<<2)|3, apicid_8131_1, 0x3);//
 227
 228         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (0xa<<2)|0, apicid_8131_1, 0x2); //
 229         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (0xa<<2)|1, apicid_8131_1, 0x3);//
 230         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (0xa<<2)|2, apicid_8131_1, 0x0);//
 231         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (0xa<<2)|3, apicid_8131_1, 0x1);//
 232
 233
 234 /*Local Ints:   Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN#*/
 235         smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
 236         smp_write_intsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
 237         /* There is no extension information... */
 238
 239         /* Compute the checksums */
 240         mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
 241         mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);
 242         printk_debug("Wrote the mp table end at: %p - %p\n",
 243                 mc, smp_next_mpe_entry(mc));
 244         return smp_next_mpe_entry(mc);
 245 }
 246
 247 unsigned long write_smp_table(unsigned long addr)
 248 {
 249         void *v;
 250         v = smp_write_floating_table(addr);
 251         return (unsigned long)smp_write_config_table(v);
 252 }