3 uses USE_FALLBACK_IMAGE
4 uses HAVE_FALLBACK_BOOT
8 uses HARD_RESET_FUNCTION
10 uses HAVE_OPTION_TABLE
19 uses ROM_SECTION_OFFSET
20 uses CONFIG_ROM_STREAM
21 uses CONFIG_ROM_STREAM_START
29 uses LB_CKS_RANGE_START
32 uses MAINBOARD_PART_NUMBER
35 uses MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
36 uses MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
37 uses LINUXBIOS_EXTRA_VERSION
47 uses DEFAULT_CONSOLE_LOGLEVEL
48 uses MAXIMUM_CONSOLE_LOGLEVEL
49 uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL
50 uses CONFIG_CONSOLE_SERIAL8250
51 uses CONFIG_CONSOLE_BTEXT
55 uses CONFIG_CONSOLE_VGA
56 uses CONFIG_PCI_ROM_RUN
60 ## ROM_SIZE is the size of boot ROM that this board will use.
62 default ROM_SIZE=524288
65 ## FALLBACK_SIZE is the amount of the ROM the complete fallback image will use
67 default FALLBACK_SIZE=131072
74 ## Build code for the fallback boot
76 default HAVE_FALLBACK_BOOT=1
79 ## Build code to reset the motherboard from linuxBIOS
81 default HAVE_HARD_RESET=1
83 default HARD_RESET_BUS=1
84 default HARD_RESET_DEVICE=4
85 default HARD_RESET_FUNCTION=0
88 ## Build code to export a programmable irq routing table
90 default HAVE_PIRQ_TABLE=1
91 default IRQ_SLOT_COUNT=11
94 ## Build code to export an x86 MP table
95 ## Useful for specifying IRQ routing values
97 default HAVE_MP_TABLE=1
100 ## Build code to export a CMOS option table
102 default HAVE_OPTION_TABLE=1
105 ## Move the default LinuxBIOS cmos range off of AMD RTC registers
107 default LB_CKS_RANGE_START=49
108 default LB_CKS_RANGE_END=122
109 default LB_CKS_LOC=123
112 ## Build code for SMP support
113 ## Only worry about 2 micro processors
116 default CONFIG_MAX_CPUS=2
120 default CK804_DEVN_BASE=0
123 #default CONFIG_CONSOLE_BTEXT=1
126 default CONFIG_CONSOLE_VGA=1
127 default CONFIG_PCI_ROM_RUN=1
130 ## Build code to setup a generic IOAPIC
132 default CONFIG_IOAPIC=1
135 ## Clean up the motherboard id strings
137 default MAINBOARD_PART_NUMBER="Tyan"
138 default MAINBOARD_VENDOR="s2891"
139 default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x10f1
140 default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x2891
143 ### LinuxBIOS layout values
146 ## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
147 default ROM_IMAGE_SIZE = 65536
150 ## Use a small 8K stack
152 default STACK_SIZE=0x2000
155 ## Use a small 16K heap
157 default HEAP_SIZE=0x4000
160 ## Only use the option table in a normal image
162 default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
165 ## LinuxBIOS C code runs at this location in RAM
167 default _RAMBASE=0x00004000
170 ## Load the payload from the ROM
172 default CONFIG_ROM_STREAM = 1
175 ### Defaults of options that you may want to override in the target config file
179 ## The default compiler
181 default CC="$(CROSS_COMPILE)gcc -m32"
185 ## Disable the gdb stub by default
187 default CONFIG_GDB_STUB=0
190 ## The Serial Console
193 # To Enable the Serial Console
194 default CONFIG_CONSOLE_SERIAL8250=1
196 ## Select the serial console baud rate
197 default TTYS0_BAUD=115200
198 #default TTYS0_BAUD=57600
199 #default TTYS0_BAUD=38400
200 #default TTYS0_BAUD=19200
201 #default TTYS0_BAUD=9600
202 #default TTYS0_BAUD=4800
203 #default TTYS0_BAUD=2400
204 #default TTYS0_BAUD=1200
206 # Select the serial console base port
207 default TTYS0_BASE=0x3f8
209 # Select the serial protocol
210 # This defaults to 8 data bits, 1 stop bit, and no parity
211 default TTYS0_LCS=0x3
214 ### Select the linuxBIOS loglevel
216 ## EMERG 1 system is unusable
217 ## ALERT 2 action must be taken immediately
218 ## CRIT 3 critical conditions
219 ## ERR 4 error conditions
220 ## WARNING 5 warning conditions
221 ## NOTICE 6 normal but significant condition
222 ## INFO 7 informational
223 ## DEBUG 8 debug-level messages
224 ## SPEW 9 Way too many details
226 ## Request this level of debugging output
227 default DEFAULT_CONSOLE_LOGLEVEL=8
228 ## At a maximum only compile in this level of debugging
229 default MAXIMUM_CONSOLE_LOGLEVEL=8
232 ## Select power on after power fail setting
233 default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"