1 #include <console/console.h>
2 #include <arch/smp/mpspec.h>
3 #include <device/pci.h>
7 void *smp_write_config_table(void *v, unsigned long * processor_map)
9 static const char sig[4] = "PCMP";
10 static const char oem[8] = "TYAN ";
11 static const char productid[12] = "S2885 ";
12 struct mp_config_table *mc;
14 unsigned char bus_num;
15 unsigned char bus_isa;
16 unsigned char bus_8131_1;
17 unsigned char bus_8131_2;
18 unsigned char bus_8111_0;
19 unsigned char bus_8111_1;
20 unsigned char bus_8151_1;
23 mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
24 memset(mc, 0, sizeof(*mc));
26 memcpy(mc->mpc_signature, sig, sizeof(sig));
27 mc->mpc_length = sizeof(*mc); /* initially just the header */
29 mc->mpc_checksum = 0; /* not yet computed */
30 memcpy(mc->mpc_oem, oem, sizeof(oem));
31 memcpy(mc->mpc_productid, productid, sizeof(productid));
34 mc->mpc_entry_count = 0; /* No entries yet... */
35 mc->mpc_lapic = LAPIC_ADDR;
40 smp_write_processors(mc, processor_map);
46 dev = dev_find_slot(3, PCI_DEVFN(0x03,0));
48 bus_8111_0 = pci_read_config8(dev, PCI_PRIMARY_BUS);
49 bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
50 bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
52 printk_debug("bus_isa=%d\n",bus_isa);
55 printk_debug("ERROR - could not find PCI 3:03.0, using defaults\n");
61 dev = dev_find_slot(3, PCI_DEVFN(0x01,0));
63 bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
67 printk_debug("ERROR - could not find PCI 3:01.0, using defaults\n");
72 dev = dev_find_slot(3, PCI_DEVFN(0x02,0));
74 bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
78 printk_debug("ERROR - could not find PCI 3:02.0, using defaults\n");
83 dev = dev_find_slot(1, PCI_DEVFN(0x02,0));
85 bus_8151_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
86 printk_debug("bus_8151_1=%d\n",bus_8151_1);
90 printk_debug("ERROR - could not find PCI 1:02.0, using defaults\n");
101 /* define bus and isa numbers */
102 for(bus_num = 0; bus_num < bus_isa; bus_num++) {
103 smp_write_bus(mc, bus_num, "PCI ");
105 smp_write_bus(mc, bus_isa, "ISA ");
107 /*I/O APICs: APIC ID Version State Address*/
108 smp_write_ioapic(mc, 2, 0x11, 0xfec00000);
112 dev = dev_find_slot(3, PCI_DEVFN(0x1,1));
114 base = pci_read_config32(dev, PCI_BASE_ADDRESS_0);
115 base &= PCI_BASE_ADDRESS_MEM_MASK;
116 smp_write_ioapic(mc, 3, 0x11, base);
118 dev = dev_find_slot(3, PCI_DEVFN(0x2,1));
120 base = pci_read_config32(dev, PCI_BASE_ADDRESS_0);
121 base &= PCI_BASE_ADDRESS_MEM_MASK;
122 smp_write_ioapic(mc, 4, 0x11, base);
126 /*I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#
127 */ smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, 0x2, 0x0);
128 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x1, 0x2, 0x1);
129 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, 0x2, 0x2);
130 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x3, 0x2, 0x3);
131 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x4, 0x2, 0x4);
132 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x5, 0x2, 0x5);
133 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x6, 0x2, 0x6);
134 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x7, 0x2, 0x7);
135 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x8, 0x2, 0x8);
136 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xc, 0x2, 0xc);
137 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xd, 0x2, 0xd);
138 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xe, 0x2, 0xe);
139 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xf, 0x2, 0xf);
141 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_0, (4<<2)|3, 0x2, 0x13);
142 //Onboard AMD AC97 Audio
143 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_0, (4<<2)|1, 0x2, 0x11);
145 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0<<2)|3, 0x2, 0x13);
147 // AGP Display Adapter
148 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8151_1, 0x0, 0x2, 0x10);
150 // Onboard Serial ATA
151 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0x0b<<2)|0, 0x2, 0x11);
153 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0x0c<<2)|0, 0x2, 0x13);
154 //Onboard Broadcom NIC
155 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (9<<2)|0, 0x3, 0x0);
158 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0x0a<<2)|0, 0x2, 0x10);
159 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0x0a<<2)|1, 0x2, 0x11);
160 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0x0a<<2)|2, 0x2, 0x12); //
161 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0x0a<<2)|3, 0x2, 0x13); //
164 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (8<<2)|0, 0x3, 0x3);
165 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (8<<2)|1, 0x3, 0x0);
166 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (8<<2)|2, 0x3, 0x1);//
167 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (8<<2)|3, 0x3, 0x2);//
170 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (7<<2)|0, 0x3, 0x2);
171 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (7<<2)|1, 0x3, 0x3);//
172 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (7<<2)|2, 0x3, 0x0);//
173 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (7<<2)|3, 0x3, 0x1);//
175 //Slot 1 PCI-X 133/100/66
176 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (3<<2)|0, 0x4, 0x0);
177 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (3<<2)|1, 0x4, 0x1);
178 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (3<<2)|2, 0x4, 0x2); //
179 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (3<<2)|3, 0x4, 0x3); //
181 //Slot 2 PCI-X 133/100/66
182 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (6<<2)|0, 0x4, 0x1);
183 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (6<<2)|1, 0x4, 0x2);
184 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (6<<2)|2, 0x4, 0x3);//
185 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (6<<2)|3, 0x4, 0x0);//
187 /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
188 smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
189 smp_write_intsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
190 /* There is no extension information... */
192 /* Compute the checksums */
193 mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
194 mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);
195 printk_debug("Wrote the mp table end at: %p - %p\n",
196 mc, smp_next_mpe_entry(mc));
197 return smp_next_mpe_entry(mc);
200 unsigned long write_smp_table(unsigned long addr, unsigned long *processor_map)
203 v = smp_write_floating_table(addr);
204 return (unsigned long)smp_write_config_table(v, processor_map);