3 uses USE_FALLBACK_IMAGE
12 ### Set all of the defaults for an x86 architecture
17 ### Build the objects we have code for in this directory.
21 register "fixup_scsi" = "1"
22 register "fixup_vga" = "1"
29 object static_devices.o
30 if HAVE_MP_TABLE object mptable.o end
31 if HAVE_PIRQ_TABLE object irq_tables.o end
37 ### Build our 16 bit and 32 bit linuxBIOS entry code
39 mainboardinit cpu/i386/entry16.inc
40 mainboardinit cpu/i386/entry32.inc
41 ldscript /cpu/i386/entry16.lds
42 ldscript /cpu/i386/entry32.lds
45 ### Build our reset vector (This is where linuxBIOS is entered)
48 mainboardinit cpu/i386/reset16.inc
49 ldscript /cpu/i386/reset16.lds
51 # print "NO FALLBACK USED!"
55 mainboardinit cpu/i386/reset32.inc
56 ldscript /cpu/i386/reset32.lds
59 #### Should this be in the northbridge code?
60 mainboardinit arch/i386/lib/cpu_reset.inc
63 ### Include an id string (For safe flashing)
65 mainboardinit arch/i386/lib/id.inc
66 ldscript /arch/i386/lib/id.lds
69 #### This is the early phase of linuxBIOS startup
70 #### Things are delicate and we test to see if we should
71 #### failover to another image.
73 #option MAX_REBOOT_CNT=2
75 ldscript /arch/i386/lib/failover.lds
81 mainboardinit cpu/k8/earlymtrr.inc
83 ### Only the bootstrap cpu makes it here.
84 ### Failover if we need to
88 mainboardinit ./failover.inc
89 # mainboardinit southbridge/amd/amd8111/cmos_boot_failover.inc
95 ### Setup the serial port
97 #mainboardinit superiowinbond/w83627hf/setup_serial.inc
98 mainboardinit pc80/serial.inc
99 mainboardinit arch/i386/lib/console.inc
102 #### O.k. We aren't just an intermediary anymore!
106 ### When debugging disable the watchdog timer
108 ##option MAXIMUM_CONSOLE_LOGLEVEL=7
109 #default MAXIMUM_CONSOLE_LOGLEVEL=7
110 #option DISABLE_WATCHDOG= (MAXIMUM_CONSOLE_LOGLEVEL >= 8)
112 # mainboardinit southbridgeamd/amd8111/disable_watchdog.inc
115 #if USE_FALLBACK_IMAGE mainboardinit arch/i386/lib/noop_failover.inc end
120 #makerule ./failover.E dep "$(MAINBOARD)/failover.c" act "$(CPP) -I$(TOP)/src $(CPPFLAGS) $(MAINBOARD)/failover.c > ./failever.E"
121 #makerule ./failover.inc dep "./romcc ./failover.E" act "./romcc -O ./failover.E > failover.inc"
122 #mainboardinit .failover.inc
124 makerule ./failover.E
125 depends "$(MAINBOARD)/failover.c"
126 action "$(CPP) -I$(TOP)/src $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/failover.c > ./failover.E"
129 makerule ./failover.inc
130 depends "./romcc ./failover.E"
131 action "./romcc -O -o failover.inc --label-prefix=failover ./failover.E"end
134 depends "$(MAINBOARD)/auto.c"
135 action "$(CPP) -I$(TOP)/src $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/auto.c > ./auto.E"
138 depends "./romcc ./auto.E"
139 action "./romcc -O -mcpu=k8 -o auto.inc --label-prefix=auto ./auto.E"
140 # action "./romcc -mcpu=k8 -O ./auto.E > auto.inc"
142 mainboardinit cpu/k8/enable_mmx_sse.inc
143 mainboardinit ./auto.inc
144 mainboardinit cpu/k8/disable_mmx_sse.inc
149 #mainboardinit ram/ramtest.inc
150 #mainboardinit southbridge/amd/amd8111/smbus.inc
151 #mainboardinit sdram/generic_dump_spd.inc
154 ### Include the secondary Configuration files
156 northbridge amd/amdk8
158 southbridge amd/amd8111 "amd8111"
160 southbridge amd/amd8131 "amd8131"
162 #mainboardinit archi386/smp/secondary.inc
164 # register "com1" = "{1}"
165 # register "lpt" = "{1}"
168 ##dir /src/superio/winbond/w83627hf
172 register "up" = "{.chip = &amd8131, .ht_width=8, .ht_speed=200}"
178 option ENABLE_IOMMU=1