src/mainboard/tyan/s2735/romstage.c

   1
   2 #include <stdint.h>
   3 #include <string.h>
   4 #include <device/pci_def.h>
   5 #include <arch/io.h>
   6 #include <device/pnp_def.h>
   7 #include <arch/romcc_io.h>
   8 #include <cpu/x86/lapic.h>
   9 #include <pc80/mc146818rtc.h>
  10 #include <console/console.h>
  11 #include <lib.h>
  12 #include <spd.h>
  13
  14 #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
  15 #include "northbridge/intel/e7501/raminit.h"
  16
  17 #include "northbridge/intel/e7501/debug.c"
  18 #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
  19
  20 #include "cpu/x86/mtrr/earlymtrr.c"
  21 #include "cpu/x86/bist.h"
  22
  23 #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
  24
  25 // FIXME: There's another hard_reset() in reset.c. Why?
  26 static void hard_reset(void)
  27 {
  28         /* full reset */
  29         outb(0x0a, 0x0cf9);
  30         outb(0x0e, 0x0cf9);
  31 }
  32
  33 static inline int spd_read_byte(unsigned device, unsigned address)
  34 {
  35         return smbus_read_byte(device, address);
  36 }
  37
  38 #include "northbridge/intel/e7501/raminit.c"
  39 #include "northbridge/intel/e7501/reset_test.c"
  40 #include "lib/generic_sdram.c"
  41
  42 void main(unsigned long bist)
  43 {
  44         static const struct mem_controller memctrl[] = {
  45                 {
  46                         .d0 = PCI_DEV(0, 0, 0),
  47                         .d0f1 = PCI_DEV(0, 0, 1),
  48                         .channel0 = { DIMM0, DIMM1, DIMM2, 0 },
  49                         .channel1 = { DIMM4, DIMM5, DIMM6, 0 },
  50                 },
  51         };
  52
  53         if (bist == 0) {
  54                 enable_lapic();
  55         }
  56
  57         w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
  58         uart_init();
  59         console_init();
  60
  61         /* Halt if there was a built in self test failure */
  62         report_bist_failure(bist);
  63
  64         if(bios_reset_detected()) {
  65                 hard_reset();
  66         }
  67
  68         enable_smbus();
  69 #if 0
  70         dump_spd_registers(&memctrl[0]);
  71 #endif
  72 #if 0
  73         dump_smbus_registers();
  74 #endif
  75
  76         sdram_initialize(1, memctrl);
  77
  78 #if 0
  79         dump_pci_devices();
  80 #endif
  81
  82 #if 1
  83         dump_pci_device(PCI_DEV(0, 0, 0));
  84 #endif
  85 }
  86