src/mainboard/tyan/s2735/romstage.c

   1 #include <stdint.h>
   2 #include <string.h>
   3 #include <device/pci_def.h>
   4 #include <arch/io.h>
   5 #include <device/pnp_def.h>
   6 #include <arch/romcc_io.h>
   7 #include <cpu/x86/lapic.h>
   8 #include <pc80/mc146818rtc.h>
   9 #include <console/console.h>
  10 #include <lib.h>
  11 #include <spd.h>
  12 #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
  13 #include "northbridge/intel/e7501/raminit.h"
  14 #include "northbridge/intel/e7501/debug.c"
  15 #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
  16 #include "cpu/x86/mtrr/earlymtrr.c"
  17 #include "cpu/x86/bist.h"
  18
  19 #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
  20
  21 // FIXME: There's another hard_reset() in reset.c. Why?
  22 static void hard_reset(void)
  23 {
  24         /* full reset */
  25         outb(0x0a, 0x0cf9);
  26         outb(0x0e, 0x0cf9);
  27 }
  28
  29 static inline int spd_read_byte(unsigned device, unsigned address)
  30 {
  31         return smbus_read_byte(device, address);
  32 }
  33
  34 #include "northbridge/intel/e7501/raminit.c"
  35 #include "northbridge/intel/e7501/reset_test.c"
  36 #include "lib/generic_sdram.c"
  37
  38 void main(unsigned long bist)
  39 {
  40         static const struct mem_controller memctrl[] = {
  41                 {
  42                         .d0 = PCI_DEV(0, 0, 0),
  43                         .d0f1 = PCI_DEV(0, 0, 1),
  44                         .channel0 = { DIMM0, DIMM1, DIMM2, 0 },
  45                         .channel1 = { DIMM4, DIMM5, DIMM6, 0 },
  46                 },
  47         };
  48
  49         if (bist == 0) {
  50                 enable_lapic();
  51         }
  52
  53         w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
  54         uart_init();
  55         console_init();
  56
  57         /* Halt if there was a built in self test failure */
  58         report_bist_failure(bist);
  59
  60         if(bios_reset_detected()) {
  61                 hard_reset();
  62         }
  63
  64         enable_smbus();
  65 #if 0
  66         dump_spd_registers(&memctrl[0]);
  67 #endif
  68 #if 0
  69         dump_smbus_registers();
  70 #endif
  71
  72         sdram_initialize(1, memctrl);
  73
  74 #if 0
  75         dump_pci_devices();
  76 #endif
  77
  78 #if 1
  79         dump_pci_device(PCI_DEV(0, 0, 0));
  80 #endif
  81 }
  82