src/mainboard/tyan/s2735/Config.lb

   1 ## CONFIG_XIP_ROM_SIZE must be a power of 2.
   2 default CONFIG_XIP_ROM_SIZE = 64 * 1024
   3 include /config/nofailovercalculation.lb
   4 default CONFIG_ROM_PAYLOAD = 1
   5
   6 arch i386 end
   7
   8 ##
   9 ## Build the objects we have code for in this directory.
  10 ##
  11
  12 driver mainboard.o
  13 if CONFIG_GENERATE_MP_TABLE object mptable.o end
  14 if CONFIG_GENERATE_PIRQ_TABLE object irq_tables.o end
  15 if CONFIG_HAVE_HARD_RESET object reset.o end
  16 if CONFIG_USE_INIT
  17
  18 makerule ./auto.o
  19         depends "$(CONFIG_MAINBOARD)/cache_as_ram_auto.c option_table.h"
  20         action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) -I$(TOP)/src -I. -c $(CONFIG_MAINBOARD)/cache_as_ram_auto.c -o $@"
  21 end
  22
  23 else
  24
  25 makerule ./auto.inc
  26         depends "$(CONFIG_MAINBOARD)/cache_as_ram_auto.c option_table.h"
  27         action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(TOP)/src -I. -c -S $(CONFIG_MAINBOARD)/cache_as_ram_auto.c -o $@"
  28         action "perl -e 's/\.rodata/.rom.data/g' -pi $@"
  29         action "perl -e 's/\.text/.section .rom.text/g' -pi $@"
  30 end
  31
  32 end
  33
  34 ##
  35 ## Build our 16 bit and 32 bit coreboot entry code
  36 ##
  37 mainboardinit cpu/x86/16bit/entry16.inc
  38 mainboardinit cpu/x86/32bit/entry32.inc
  39 ldscript /cpu/x86/16bit/entry16.lds
  40         if CONFIG_USE_INIT
  41                 ldscript /cpu/x86/32bit/entry32.lds
  42         end
  43
  44         if CONFIG_USE_INIT
  45                 ldscript      /cpu/x86/car/cache_as_ram.lds
  46         end
  47
  48
  49 ##
  50 ## Build our reset vector (This is where coreboot is entered)
  51 ##
  52 if CONFIG_USE_FALLBACK_IMAGE
  53         mainboardinit cpu/x86/16bit/reset16.inc
  54         ldscript /cpu/x86/16bit/reset16.lds
  55 else
  56         mainboardinit cpu/x86/32bit/reset32.inc
  57         ldscript /cpu/x86/32bit/reset32.lds
  58 end
  59
  60 ##
  61 ## Include an id string (For safe flashing)
  62 ##
  63 mainboardinit arch/i386/lib/id.inc
  64 ldscript /arch/i386/lib/id.lds
  65
  66 ##
  67 ## Setup Cache-As-Ram
  68 ##
  69 mainboardinit cpu/x86/car/cache_as_ram.inc
  70
  71 ###
  72 ### This is the early phase of coreboot startup
  73 ### Things are delicate and we test to see if we should
  74 ### failover to another image.
  75 ###
  76 if CONFIG_USE_FALLBACK_IMAGE
  77        ldscript /arch/i386/lib/failover.lds
  78 end
  79
  80 ##
  81 ## Setup RAM
  82 ##
  83 if CONFIG_USE_INIT
  84 initobject auto.o
  85 else
  86 mainboardinit ./auto.inc
  87 end
  88
  89 ##
  90 ## Include the secondary Configuration files
  91 ##
  92 config chip.h
  93
  94 # sample config for tyan/s2735
  95 chip northbridge/intel/e7501
  96         device pci_domain 0 on
  97                 device pci 0.0 on end
  98                 device pci 0.1 on end
  99                 device pci 2.0 on
 100                         chip southbridge/intel/i82870
 101                                 device pci 1c.0 on end
 102                                 device pci 1d.0 on
 103                                          device pci 1.0 on end # intel lan
 104                                         device pci 1.1 on end
 105                                 end
 106                                 device pci 1e.0 on end
 107                                 device pci 1f.0 on end
 108                         end
 109                 end
 110                 device pci 6.0 on end
 111                 chip southbridge/intel/i82801er
 112                         device pci 1d.0 on end
 113                         device pci 1d.1 on end
 114                         device pci 1d.2 on end
 115                         device pci 1d.3 on end
 116                         device pci 1d.7 on end
 117                         device pci 1e.0 on
 118                                 device pci 1.0 on end # intel lan 10/100
 119                                 device pci 2.0 on end # ati
 120                         end
 121                         device pci 1f.0 on
 122                                 chip superio/winbond/w83627hf
 123                                         device pnp 2e.0 on #  Floppy
 124                                                 io 0x60 = 0x3f0
 125                                                 irq 0x70 = 6
 126                                                 drq 0x74 = 2
 127                                         end
 128                                         device pnp 2e.1 off #  Parallel Port
 129                                                 io 0x60 = 0x378
 130                                                 irq 0x70 = 7
 131                                         end
 132                                         device pnp 2e.2 on #  Com1
 133                                                 io 0x60 = 0x3f8
 134                                                 irq 0x70 = 4
 135                                         end
 136                                         device pnp 2e.3 on #  Com2
 137                                                 io 0x60 = 0x2f8
 138                                                 irq 0x70 = 3
 139                                         end
 140                                         device pnp 2e.5 on #  Keyboard
 141                                                 io 0x60 = 0x60
 142                                                 io 0x62 = 0x64
 143                                                 irq 0x70 = 1
 144                                                 irq 0x72 = 12
 145                                         end
 146                                         device pnp 2e.6 off #  CIR
 147                                                 io 0x60 = 0x100
 148                                         end
 149                                         device pnp 2e.7 off #  GAME_MIDI_GIPO1
 150                                                 io 0x60 = 0x220
 151                                                 io 0x62 = 0x300
 152                                                 irq 0x70 = 9
 153                                         end
 154                                         device pnp 2e.8 off end #  GPIO2
 155                                         device pnp 2e.9 off end #  GPIO3
 156                                         device pnp 2e.a off end #  ACPI
 157                                         device pnp 2e.b on #  HW Monitor
 158                                                 io 0x60 = 0x290
 159                                                 irq 0x70 = 5
 160                                         end
 161                                 end
 162                         end
 163                         device pci 1f.1 off end
 164                         device pci 1f.2 on end
 165                         device pci 1f.3 on end
 166                         device pci 1f.5 off end
 167                         device pci 1f.6 off end
 168                 end # SB
 169         end # PCI_DOMAIN
 170         device apic_cluster 0 on
 171                 chip cpu/intel/socket_mPGA604
 172                         device apic 0 on end
 173                 end
 174                 chip cpu/intel/socket_mPGA604
 175                         device apic 6 on end
 176                 end
 177         end
 178 end
 179