1 ; bdiGDB configuration file for briQ (http://www.totalimpact.com)
2 ; ---------------------------------------------------------------
4 ; NOTE: As of June 2004, you will need to install a pull-down
5 ; on the COP/JTAG QACK line. Without this, the BDI2000
6 ; is not able to halt the CPU
7 ; (http://www.ultsol.com/faq-P210.htm)
11 WREG MSR 0x00000000 ;clear MSR
15 WM32 0xFF000010 0xF0000000 ; RSTR
16 WM32 0xFF001020 0x00000000 ; SIOC
17 WM32 0xFF001000 0x00780000 ; UCTL (resID=7|TBE)
18 WM32 0xFF001030 0x00000000 ; ABCNTL
19 WM32 0xFF001040 0x00000000 ; SRST
20 WM32 0xFF001050 0x00000000 ; ERRC
21 WM32 0xFF001060 0x00000000 ; SESR
22 WM32 0xFF001070 0x00000000 ; SEAR
23 WM32 0xFF001100 0x000000E0 ; PGCHP (PReP|ARTRY|750|SYS_TEA)
24 WM32 0xFF001130 0x40000000 ; GPDIR
25 WM32 0xFF001150 0x40000000 ; GPOUT
26 WM32 0xFF001160 0x709C2508 ; ATAS
27 WM32 0xFF001170 0x00000000 ; AVDG
28 WM32 0xFF001220 0x00000000 ; MESR
29 WM32 0xFF001230 0x00000000 ; MEAR
30 WM32 0xFF001210 0x00000000 ; MWPR
31 WM32 0xFF001120 0x00000000 ; RGBAN1
33 ; init memory - this assumes 2 x 512MB DIMMs
35 WM32 0xFF001300 0x80000080 ; MCER0
36 WM32 0xFF001310 0x82000080 ; MCER1
37 WM32 0xFF001320 0x00000000 ; MCER2
38 WM32 0xFF001330 0x00000000 ; MCER3
39 WM32 0xFF001340 0x00000000 ; MCER4
40 WM32 0xFF001350 0x00000000 ; MCER5
41 WM32 0xFF001200 0xD2B06000 ; MCCR
46 WM32 0xFF00000C 0x80000002 ; CNFR
47 WM32 0xFF200018 0xFF500000 ; PCIBAR
48 WM32 0xFF201000 0x80000000 ; PCIENB
49 WM32 0xFF00000C 0x00000000 ; CNFR
53 WM32 0xFF5F8000 0x06000080
54 WM16 0xFF5F8010 0xFFFF
55 WM32 0xFF5F8000 0x40000080
56 WM16 0xFF5F8010 0x0000
57 WM32 0xFF5F6120 0x40000000 ; PCIDG
58 WM32 0xFF5F7800 0x00000000 ; PIBAR
59 WM32 0xFF5F7810 0x00000000 ; PMBAR
60 WM32 0xFF5F7F20 0xA000C000 ; PR
61 WM32 0xFF5F7F30 0xFC000000 ; ACR
62 WM32 0xFF5F7F40 0xF8000000 ; MSIZE
63 WM32 0xFF5F7F60 0xF8000000 ; IOSIZE
64 WM32 0xFF5F7F80 0xC0000000 ; SMBAR
65 WM32 0xFF5F7FC0 0x80000000 ; SIBAR
66 WM32 0xFF5F8100 0x00000080 ; PSSIZE
67 WM32 0xFF5F8120 0x00000000 ; BARPS
68 WM32 0xFF5F8140 0x00000080 ; PSBAR
69 WM32 0xFF5F8200 0x00000000 ; BPMDLK
70 WM32 0xFF5F8210 0x00000000 ; TPMDLK
71 WM32 0xFF5F8220 0x00000000 ; BIODLK
72 WM32 0xFF5F8230 0x00000000 ; TIODLK
73 WM32 0xFF5F8000 0x04000080
74 WM16 0xFF5F8010 0xA7FD
75 WM32 0xFF5F7EF0 0xFC000000 ; CRR
77 ; VFD - output the sequence '01234' to show
78 ; something is happening
96 ; UART - output the sequence '01234' to show
97 ; something is happening
102 WM8 0x800003F8 4 ; 115200
116 ; define maximal transfer size
117 ;TSZ1 0xFF800000 0xFFFFFFFF ;ROM space (only for PCI boot ROM)
118 TSZ4 0xFF800000 0xFFFFFFFF ;ROM space (only for Local bus flash)
122 CPUTYPE 7400 ;the CPU type (603EV,750,8240,8260,7400)
123 JTAGCLOCK 0 ;use 16 MHz JTAG clock
124 WORKSPACE 0x00000000 ;workspace in target RAM for data cache flush
125 BDIMODE AGENT ;the BDI working mode (LOADONLY | AGENT | GATEWAY)
126 BREAKMODE HARD ;SOFT or HARD, HARD uses PPC hardware breakpoint
127 STEPMODE TRACE ;TRACE or HWBP, HWPB uses a hardware breakpoint
128 ;VECTOR CATCH ;catch unhandled exceptions
129 DCACHE FLUSH ;data cache flushing (FLUSH | NOFLUSH)
130 ;PARITY ON ;enable data parity generation
131 ;MEMDELAY 4000 ;additional memory access delay
132 ;REGLIST STD ;select register to transfer to GDB
133 ;L2PM 0x00100000 0x80000 ;L2 privat memory
139 LOAD MANUAL ;load code MANUAL or AUTO after reset
143 ; Am29LV800BB on local processor bus (RCS0)
144 ; set PPMC7410 switch SW2-1 OFF => ROM on Local bus
145 ; enable flash write in PICR1 (see INIT part)
146 ; set maximal transfer size to 4 bytes (see INIT part)
147 CHIPTYPE AM29F ;Flash type (AM29F | AM29BX8 | AM29BX16 | I28BX8 | I28BX16)
148 CHIPSIZE 0x100000 ;The size of one flash chip in bytes (e.g. Am29LV800BB = 0x100000)
149 BUSWIDTH 8 ;The width of the flash memory bus in bits (8 | 16 | 32 | 64)
150 ;WORKSPACE 0x00000000 ;workspace in SDRAM
153 ERASE 0xFFF00000 ;erase sector 0 of flash
154 ERASE 0xFFF10000 ;erase sector 1 of flash
155 ERASE 0xFFF20000 ;erase sector 2 of flash
156 ERASE 0xFFF30000 ;erase sector 3 of flash
157 ERASE 0xFFF40000 ;erase sector 4 of flash
158 ERASE 0xFFF50000 ;erase sector 5 of flash
159 ERASE 0xFFF60000 ;erase sector 6 of flash
160 ERASE 0xFFF70000 ;erase sector 7 of flash
161 ;ERASE 0xFFF80000 ;erase sector 8 of flash
162 ;ERASE 0xFFF90000 ;erase sector 9 of flash
163 ;ERASE 0xFFFA0000 ;erase sector 10 of flash
164 ;ERASE 0xFFFB0000 ;erase sector 11 of flash
165 ;ERASE 0xFFFC0000 ;erase sector 12 of flash
166 ;ERASE 0xFFFD0000 ;erase sector 13 of flash
167 ;ERASE 0xFFFE0000 ;erase sector 14 of flash
168 ;ERASE 0xFFFF0000 ;erase sector 15 of flash
171 ;DMM1 0xFC000000 ;Embedded utility memory base address
172 ;IMM1 0xFEC00000 0xFEE00000 ;configuration registers at byte offset 0
173 ;IMM2 0xFEC00000 0xFEE00001 ;configuration registers at byte offset 1
174 ;IMM3 0xFEC00000 0xFEE00002 ;configuration registers at byte offset 2
175 ;IMM4 0xFEC00000 0xFEE00003 ;configuration registers at byte offset 3