Move "select CACHE_AS_RAM" lines from boards into CPU socket.
[coreboot.git] / src / mainboard / technexion / tim8690 / Kconfig
1 if BOARD_TECHNEXION_TIM8690
2
3 config BOARD_SPECIFIC_OPTIONS # dummy
4         def_bool y
5         select ARCH_X86
6         select CPU_AMD_SOCKET_S1G1
7         select NORTHBRIDGE_AMD_AMDK8
8         select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
9         select SOUTHBRIDGE_AMD_RS690
10         select SOUTHBRIDGE_AMD_SB600
11         select SUPERIO_ITE_IT8712F
12         select BOARD_HAS_FADT
13         select HAVE_BUS_CONFIG
14         select HAVE_OPTION_TABLE
15         select HAVE_PIRQ_TABLE
16         select HAVE_MP_TABLE
17         select HAVE_HARD_RESET
18         select SB_HT_CHAIN_UNITID_OFFSET_ONLY
19         select WAIT_BEFORE_CPUS_INIT
20         select HAVE_ACPI_TABLES
21         select BOARD_ROMSIZE_KB_512
22         select RAMINIT_SYSINFO
23         select QRANK_DIMM_SUPPORT
24         select SET_FIDVID
25
26 config MAINBOARD_DIR
27         string
28         default technexion/tim8690
29
30 config APIC_ID_OFFSET
31         hex
32         default 0x0
33
34 config MAINBOARD_PART_NUMBER
35         string
36         default "TIM-8690"
37
38 config MAX_CPUS
39         int
40         default 2
41
42 config MAX_PHYSICAL_CPUS
43         int
44         default 1
45
46 config SB_HT_CHAIN_ON_BUS0
47         int
48         default 1
49
50 config HT_CHAIN_END_UNITID_BASE
51         hex
52         default 0x1
53
54 config HT_CHAIN_UNITID_BASE
55         hex
56         default 0x0
57
58 config IRQ_SLOT_COUNT
59         int
60         default 11
61
62 config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
63         hex
64         default 0x1022
65
66 config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
67         hex
68         default 0x3050
69
70 endif # BOARD_TECHNEXION_TIM8690