3 static void print_reg(unsigned char index)
10 print_debug_hex8(index);
12 print_debug_hex8(data);
17 static void xbus_en(void)
19 /* select the XBUS function in the SIO */
27 static void setup_func(unsigned char func)
29 /* select the function in the SIO */
32 /* print out the regs */
45 static void siodump(void)
50 print_debug("\n*** SERVER I/O REGISTERS ***\n");
51 for (i=0x10; i<=0x2d; i++) {
52 print_reg((unsigned char)i);
55 print_debug("\n*** XBUS REGISTERS ***\n");
57 for (i=0xf0; i<=0xff; i++) {
58 print_reg((unsigned char)i);
61 print_debug("\n*** SERIAL 1 CONFIG REGISTERS ***\n");
65 print_debug("\n*** SERIAL 2 CONFIG REGISTERS ***\n");
70 print_debug("\n*** GPIO REGISTERS ***\n");
72 for (i=0xf0; i<=0xf8; i++) {
73 print_reg((unsigned char)i);
75 print_debug("\n*** GPIO VALUES ***\n");
77 print_debug("\nGPDO 4: 0x");
78 print_debug_hex8(data);
80 print_debug("\nGPDI 4: 0x");
81 print_debug_hex8(data);
86 print_debug("\n*** WATCHDOG TIMER REGISTERS ***\n");
90 print_debug("\n*** FAN CONTROL REGISTERS ***\n");
95 print_debug("\n*** RTC REGISTERS ***\n");
105 print_debug("\n*** HEALTH MONITORING & CONTROL REGISTERS ***\n");
112 static void print_debug_pci_dev(unsigned dev)
114 print_debug("PCI: ");
115 print_debug_hex8((dev >> 16) & 0xff);
116 print_debug_char(':');
117 print_debug_hex8((dev >> 11) & 0x1f);
118 print_debug_char('.');
119 print_debug_hex8((dev >> 8) & 7);
122 static void print_pci_devices(void)
125 for(dev = PCI_DEV(0, 0, 0);
126 dev <= PCI_DEV(0, 0x1f, 0x7);
127 dev += PCI_DEV(0,0,1)) {
129 id = pci_read_config32(dev, PCI_VENDOR_ID);
130 if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
131 (((id >> 16) & 0xffff) == 0xffff) ||
132 (((id >> 16) & 0xffff) == 0x0000)) {
135 print_debug_pci_dev(dev);
140 static void dump_pci_device(unsigned dev)
143 print_debug_pci_dev(dev);
146 for(i = 0; i <= 255; i++) {
148 if ((i & 0x0f) == 0) {
150 print_debug_char(':');
152 val = pci_read_config8(dev, i);
153 print_debug_char(' ');
154 print_debug_hex8(val);
155 if ((i & 0x0f) == 0x0f) {
161 static void dump_bar14(unsigned dev)
166 print_debug("BAR 14 Dump\n");
168 bar = pci_read_config32(dev, 0x14);
169 for(i = 0; i <= 0x300; i+=4) {
172 if ((i & 0x0f) == 0) {
174 print_debug_char(':');
176 val = pci_read_config8(dev, i);
180 print_debug_hex16(i);
181 print_debug_char(' ');
183 print_debug_hex32(read32(bar + i));
184 print_debug_char(' ');
189 static void dump_pci_devices(void)
192 for(dev = PCI_DEV(0, 0, 0);
193 dev <= PCI_DEV(0, 0x1f, 0x7);
194 dev += PCI_DEV(0,0,1)) {
196 id = pci_read_config32(dev, PCI_VENDOR_ID);
197 if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
198 (((id >> 16) & 0xffff) == 0xffff) ||
199 (((id >> 16) & 0xffff) == 0x0000)) {
202 dump_pci_device(dev);
207 static void dump_spd_registers(const struct mem_controller *ctrl)
211 for(i = 0; i < 4; i++) {
213 device = ctrl->channel0[i];
216 print_debug("dimm: ");
219 print_debug_hex8(device);
220 for(j = 0; j < 256; j++) {
223 if ((j & 0xf) == 0) {
228 status = smbus_read_byte(device, j);
230 print_debug("bad device\n");
233 byte = status & 0xff;
234 print_debug_hex8(byte);
235 print_debug_char(' ');
239 device = ctrl->channel1[i];
242 print_debug("dimm: ");
245 print_debug_hex8(device);
246 for(j = 0; j < 256; j++) {
249 if ((j & 0xf) == 0) {
254 status = smbus_read_byte(device, j);
256 print_debug("bad device\n");
259 byte = status & 0xff;
260 print_debug_hex8(byte);
261 print_debug_char(' ');
269 void dump_spd_registers(void)
273 while(device <= DIMM7) {
277 print_debug("dimm ");
278 print_debug_hex8(device);
280 for(i = 0; (i < 256) ; i++) {
287 status = smbus_read_byte(device, i);
289 print_debug("bad device: ");
290 print_debug_hex8(-status);
294 print_debug_hex8(status);
295 print_debug_char(' ');
302 void dump_ipmi_registers(void)
306 while(device <= 0x42) {
310 print_debug("ipmi ");
311 print_debug_hex8(device);
313 for(i = 0; (i < 8) ; i++) {
315 status = smbus_read_byte(device, 2);
317 print_debug("bad device: ");
318 print_debug_hex8(-status);
322 print_debug_hex8(status);
323 print_debug_char(' ');