1 #include <console/console.h>
2 #include <arch/smp/mpspec.h>
3 #include <arch/ioapic.h>
4 #include <device/pci.h>
8 static void *smp_write_config_table(void *v)
10 struct mp_config_table *mc;
11 unsigned char bus_num;
12 unsigned char bus_isa;
13 unsigned char bus_pxhd_1;
14 unsigned char bus_pxhd_2;
15 unsigned char bus_pxhd_3;
16 unsigned char bus_pxhd_4;
17 unsigned char bus_ich5r_1;
19 mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
21 mptable_init(mc, "X6DHR-iG ", LAPIC_ADDR);
23 smp_write_processors(mc);
29 dev = dev_find_slot(0, PCI_DEVFN(0x1e,0));
31 bus_ich5r_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
32 bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
36 printk(BIOS_DEBUG, "ERROR - could not find PCI 0:1f.0, using defaults\n");
42 dev = dev_find_slot(2, PCI_DEVFN(0x0,0));
44 bus_pxhd_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
48 printk(BIOS_DEBUG, "ERROR - could not find PCI 1:00.1, using defaults\n");
53 dev = dev_find_slot(2, PCI_DEVFN(0x00,2));
55 bus_pxhd_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
59 printk(BIOS_DEBUG, "ERROR - could not find PCI 1:02.0, using defaults\n");
65 dev = dev_find_slot(5, PCI_DEVFN(0x0,0));
67 bus_pxhd_3 = pci_read_config8(dev, PCI_SECONDARY_BUS);
71 printk(BIOS_DEBUG, "ERROR - could not find PCI 1:00.1, using defaults\n");
76 dev = dev_find_slot(5, PCI_DEVFN(0x00,2));
78 bus_pxhd_4 = pci_read_config8(dev, PCI_SECONDARY_BUS);
82 printk(BIOS_DEBUG, "ERROR - could not find PCI 1:02.0, using defaults\n");
89 /* define bus and isa numbers */
90 for(bus_num = 0; bus_num < bus_isa; bus_num++) {
91 smp_write_bus(mc, bus_num, "PCI ");
93 smp_write_bus(mc, bus_isa, "ISA ");
97 smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);
102 dev = dev_find_slot(2, PCI_DEVFN(0x00,1));
104 res = find_resource(dev, PCI_BASE_ADDRESS_0);
106 smp_write_ioapic(mc, 0x03, 0x20, res->base);
110 printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 2:00.1\n");
113 dev = dev_find_slot(2, PCI_DEVFN(0x00,3));
115 res = find_resource(dev, PCI_BASE_ADDRESS_0);
117 smp_write_ioapic(mc, 0x04, 0x20, res->base);
121 printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 2:00.3\n");
124 dev = dev_find_slot(5, PCI_DEVFN(0x00,1));
126 res = find_resource(dev, PCI_BASE_ADDRESS_0);
128 smp_write_ioapic(mc, 0x05, 0x20, res->base);
132 printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 5:00.1\n");
135 dev = dev_find_slot(5, PCI_DEVFN(0x00,3));
137 res = find_resource(dev, PCI_BASE_ADDRESS_0);
139 smp_write_ioapic(mc, 0x08, 0x20, res->base);
143 printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 5:00.3\n");
147 mptable_add_isa_interrupts(mc, bus_isa, 0x2, 0);
149 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
150 0x00, 0x74, 0x02, 0x10);
151 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
152 0x00, 0x76, 0x02, 0x12);
153 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
154 0x00, 0x77, 0x02, 0x17);
155 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
156 0x00, 0x75, 0x02, 0x13);
157 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
158 0x00, 0x74, 0x02, 0x10);
159 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
160 0x00, 0x7c, 0x02, 0x12);
161 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
162 0x00, 0x7d, 0x02, 0x11);
163 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
164 bus_pxhd_2, 0x08, 0x04, 0x06);
165 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
166 bus_pxhd_2, 0x09, 0x04, 0x07);
167 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
168 bus_pxhd_3, 0x08, 0x05, 0x00);
169 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
170 bus_pxhd_4, 0x08, 0x08, 0x00);
171 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
172 (bus_isa - 1), 0x04, 0x02, 0x10);
174 /* Standard local interrupt assignments */
175 smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
176 bus_isa, 0x00, MP_APIC_ALL, 0x00);
177 smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
178 bus_isa, 0x00, MP_APIC_ALL, 0x01);
180 /* There is no extension information... */
182 /* Compute the checksums */
183 mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
185 mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);
186 printk(BIOS_DEBUG, "Wrote the mp table end at: %p - %p\n",
187 mc, smp_next_mpe_entry(mc));
188 return smp_next_mpe_entry(mc);
191 unsigned long write_smp_table(unsigned long addr)
194 v = smp_write_floating_table(addr);
195 return (unsigned long)smp_write_config_table(v);