2 #include <device/pci_def.h>
4 #include <device/pnp_def.h>
5 #include <arch/romcc_io.h>
6 #include <cpu/x86/lapic.h>
8 #include <console/console.h>
9 #include "southbridge/intel/i82801ex/early_smbus.c"
10 #include "northbridge/intel/e7520/raminit.h"
11 #include "superio/nsc/pc87427/pc87427.h"
12 #include "cpu/x86/lapic/boot_cpu.c"
13 #include "cpu/x86/mtrr/earlymtrr.c"
17 #include "superio/nsc/pc87427/early_init.c"
18 #include "northbridge/intel/e7520/memory_initialized.c"
19 #include "cpu/x86/bist.h"
22 #define CONSOLE_SERIAL_DEV PNP_DEV(0x2e, PC87427_SP1)
23 #define HIDDEN_SERIAL_DEV PNP_DEV(0x2e, PC87427_SP2)
25 #define DEVPRES_CONFIG ( \
32 #define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0)
34 static void mch_reset(void) {}
35 static void mainboard_set_e7520_pll(unsigned bits) {}
36 static void mainboard_set_e7520_leds(void) {}
38 static inline int spd_read_byte(unsigned device, unsigned address)
40 return smbus_read_byte(device, address);
43 #include "northbridge/intel/e7520/raminit.c"
44 #include "lib/generic_sdram.c"
45 #include "arch/x86/lib/stages.c"
47 static void main(unsigned long bist)
49 static const struct mem_controller mch[] = {
52 .channel0 = {DIMM3, DIMM2, DIMM1, DIMM0, },
53 .channel1 = {DIMM7, DIMM6, DIMM5, DIMM4, },
58 /* Skip this if there was a built in self test failure */
60 if (memory_initialized())
64 /* Setup the console */
67 pnp_write_config(CONSOLE_SERIAL_DEV, 0x24, 0x84 | (1 << 6));
68 pc87427_enable_dev(CONSOLE_SERIAL_DEV, CONFIG_TTYS0_BASE);
72 /* Halt if there was a built in self test failure */
73 // report_bist_failure(bist);
75 /* MOVE ME TO A BETTER LOCATION !!! */
76 /* config LPC decode for flash memory access */
78 dev = pci_locate_device(PCI_ID(0x8086, 0x25a1), 0);
79 if (dev == PCI_DEV_INVALID)
80 die("Missing ich5r?");
81 pci_write_config32(dev, 0xe8, 0x00000000);
82 pci_write_config8(dev, 0xf0, 0x00);
85 display_cpuid_update_microcode();
92 // dump_spd_registers(&cpu[0]);
94 for(i = 0; i < 1; i++)
98 // dump_ipmi_registers();
99 // mainboard_set_e7520_leds();
100 sdram_initialize(ARRAY_SIZE(mch), mch);
105 dump_pci_device(PCI_DEV(0, 0x00, 0));
106 //dump_bar14(PCI_DEV(0, 0x00, 0));