1 #include <console/console.h>
2 #include <arch/smp/mpspec.h>
3 #include <device/pci.h>
7 static void *smp_write_config_table(void *v)
9 static const char sig[4] = "PCMP";
10 static const char oem[8] = "COREBOOT";
11 static const char productid[12] = "X6DAI-G ";
12 struct mp_config_table *mc;
13 unsigned char bus_num;
14 unsigned char bus_isa;
15 unsigned char bus_6300;
17 mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
18 memset(mc, 0, sizeof(*mc));
20 memcpy(mc->mpc_signature, sig, sizeof(sig));
21 mc->mpc_length = sizeof(*mc); /* initially just the header */
23 mc->mpc_checksum = 0; /* not yet computed */
24 memcpy(mc->mpc_oem, oem, sizeof(oem));
25 memcpy(mc->mpc_productid, productid, sizeof(productid));
28 mc->mpc_entry_count = 0; /* No entries yet... */
29 mc->mpc_lapic = LAPIC_ADDR;
34 smp_write_processors(mc);
40 dev = dev_find_slot(0, PCI_DEVFN(0x1e,0));
42 bus_6300 = pci_read_config8(dev, PCI_SECONDARY_BUS);
43 bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
47 printk(BIOS_DEBUG, "ERROR - could not find PCI 0:1e.0, using defaults\n");
53 /* define bus and isa numbers */
54 for(bus_num = 0; bus_num < bus_isa; bus_num++) {
55 smp_write_bus(mc, bus_num, "PCI ");
57 smp_write_bus(mc, bus_isa, "ISA ");
61 smp_write_ioapic(mc, 2, 0x20, 0xfec00000);
62 smp_write_ioapic(mc, 3, 0x20, 0xfec10000);
64 mptable_add_isa_interrupts(mc, bus_isa, 0x2, 0);
66 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
67 0x00, 0x74, 0x02, 0x10);
68 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
69 0x00, 0x77, 0x02, 0x17);
70 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
71 0x00, 0x75, 0x02, 0x13);
72 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
73 0x00, 0x7c, 0x02, 0x12);
74 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
75 0x00, 0x7d, 0x02, 0x11);
76 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
77 0x00, 0x7d, 0x02, 0x11);
78 /* Slot 1 function 0 */
79 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
81 /* Slot 2 function 0 */
82 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
84 /* Slot 3 function 0 */
85 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
86 bus_6300, 0x20, 0x02, 0x14);
87 /* Slot 4 function 0 */
88 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
89 bus_6300, 0x08, 0x02, 0x15);
91 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
92 bus_6300, 0x0c, 0x02, 0x16);
94 /* Standard local interrupt assignments */
95 // smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
96 // bus_isa, 0x00, MP_APIC_ALL, 0x00);
97 smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
98 bus_isa, 0x00, MP_APIC_ALL, 0x01);
100 /* There is no extension information... */
102 /* Compute the checksums */
103 mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
105 mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);
106 printk(BIOS_DEBUG, "Wrote the mp table end at: %p - %p\n",
107 mc, smp_next_mpe_entry(mc));
108 return smp_next_mpe_entry(mc);
111 unsigned long write_smp_table(unsigned long addr)
114 v = smp_write_floating_table(addr);
115 return (unsigned long)smp_write_config_table(v);