1 if BOARD_SUPERMICRO_H8SCM_FAM10
3 config BOARD_SPECIFIC_OPTIONS # dummy
6 select CPU_AMD_SOCKET_C32
9 select NORTHBRIDGE_AMD_AMDFAM10
10 select SOUTHBRIDGE_AMD_SR5650
11 select SOUTHBRIDGE_AMD_SP5100
12 select SUPERIO_WINBOND_W83627HF
13 select SUPERIO_NUVOTON_WPCM450
14 select HAVE_BUS_CONFIG
15 select HAVE_OPTION_TABLE
16 select GENERATE_PIRQ_TABLE
17 select GENERATE_MP_TABLE
18 select HAVE_HARD_RESET
19 select SB_HT_CHAIN_UNITID_OFFSET_ONLY
20 select LIFT_BSP_APIC_ID
21 select SERIAL_CPU_INIT
23 select GENERATE_ACPI_TABLES
24 select BOARD_ROMSIZE_KB_2048
25 select RAMINIT_SYSINFO
26 select ENABLE_APIC_EXT_ID
30 default supermicro/h8scm_fam10
36 config MAINBOARD_PART_NUMBER
38 default "H8SCM (Fam10)"
44 config MAX_PHYSICAL_CPUS
52 config SB_HT_CHAIN_ON_BUS0
56 config HT_CHAIN_END_UNITID_BASE
60 config HT_CHAIN_UNITID_BASE
68 config AMD_UCODE_PATCH_FILE
70 default "mc_patch_010000c4.h"
88 endif # BOARD_AMD_H8SCM_FAM10