2 * This file is part of the coreboot project.
4 * Copyright (C) 2011 Advanced Micro Devices, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 #include <console/console.h>
21 #include <device/device.h>
22 #include <device/pci.h>
24 #include <boot/tables.h>
25 #include <cpu/x86/msr.h>
26 #include <cpu/amd/mtrr.h>
27 #include <device/pci_def.h>
28 #include "southbridge/amd/sr5650/cmn.h"
31 void set_pcie_dereset(void);
32 void set_pcie_reset(void);
37 void set_pcie_reset(void)
42 * Release Resets to PCIe Links
43 * PCIE_RESET_GPIO1,2,4,5
45 void set_pcie_dereset(void)
47 device_t pcie_core_dev;
49 pcie_core_dev = dev_find_slot(0, PCI_DEVFN(0, 0));
50 set_htiu_enable_bits(pcie_core_dev, 0xA8, 0x07000707, 0x07000707);
51 set_htiu_enable_bits(pcie_core_dev, 0xA9, 0x00000007, 0x00000007);
55 /*************************************************
56 * enable the dedicated function in h8qgi board.
57 *************************************************/
58 static void h8qgi_enable(device_t dev)
60 printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n");
63 #if (CONFIG_HAVE_MAINBOARD_RESOURCES == 1)
64 int add_mainboard_resources(struct lb_memory *mem)
70 struct chip_operations mainboard_ops = {
71 CHIP_NAME(CONFIG_MAINBOARD_VENDOR " " CONFIG_MAINBOARD_PART_NUMBER " Mainboard")
72 .enable_dev = h8qgi_enable,