2 * This file is part of the coreboot project.
4 * Copyright (C) 2011 - 2012 Advanced Micro Devices, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 #include <console/console.h>
21 #include <device/pci.h>
22 #include <device/pci_ids.h>
26 #include "agesawrapper.h"
27 #if CONFIG_AMD_SB_CIMX
32 /* Global variables for MB layouts and these will be shared by irqtable mptable
33 * and acpi_tables busnum is default.
45 static u32 get_bus_conf_done = 0;
48 void get_bus_conf(void)
55 if (get_bus_conf_done == 1)
56 return; /* do it only once */
58 get_bus_conf_done = 1;
61 * This is the call to AmdInitLate. It is really in the wrong place, conceptually,
62 * but functionally within the coreboot model, this is the best place to make the
63 * call. The logically correct place to call AmdInitLate is after PCI scan is done,
64 * after the decision about S3 resume is made, and before the system tables are
65 * written into RAM. The routine that is responsible for writing the tables is
66 * "write_tables", called near the end of "hardwaremain". There is no platform
67 * specific entry point between the S3 resume decision point and the call to
68 * "write_tables", and the next platform specific entry points are the calls to
69 * the ACPI table write functions. The first of ose would seem to be the right
70 * place, but other table write functions, e.g. the PIRQ table write function, are
71 * called before the ACPI tables are written. This routine is called at the beginning
72 * of each of the write functions called prior to the ACPI write functions, so this
73 * becomes the best place for this call.
75 status = agesawrapper_amdinitlate();
77 printk(BIOS_DEBUG, "agesawrapper_amdinitlate failed: %x \n", status);
82 for (i = 0; i < 0; i++) {
85 for (i = 0; i < ARRAY_SIZE(bus_sr5650); i++) {
89 for (i = 0; i < 256; i++) {
90 bus_type[i] = 0; /* default ISA bus. */
93 bus_type[0] = 1; /* pci */
96 bus_sp5100[0] = bus_sr5650[0];
99 dev = dev_find_slot(bus_sp5100[0], PCI_DEVFN(sbdn_sp5100 + 0x14, 4));
102 bus_sp5100[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
104 bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
106 for (j = bus_sp5100[1]; j < bus_isa; j++)
111 for (i = 1; i < ARRAY_SIZE(bus_sr5650); i++) {
112 dev = dev_find_slot(bus_sr5650[0], PCI_DEVFN(sbdn_sr5650 + i, 0));
114 bus_sr5650[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
115 if(255 != bus_sr5650[i]) {
116 bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
118 bus_type[bus_sr5650[i]] = 1; /* PCI bus. */
124 for (i = 0; i < 4; i++) {
125 dev = dev_find_slot(bus_sp5100[0], PCI_DEVFN(sbdn_sp5100 + 0x14, i));
127 bus_sp5100[2 + i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
128 bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
132 for (j = bus_sp5100[2]; j < bus_isa; j++)
137 /* I/O APICs: APIC ID Version State Address */
140 #if CONFIG_AMD_SB_CIMX