src/mainboard/supermicro/h8qgi/dsdt.asl

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2011 - 2012 Advanced Micro Devices, Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; version 2 of the License.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  18  */
  19
  20 /* DefinitionBlock Statement */
  21 DefinitionBlock (
  22         "DSDT.AML",     /* Output filename */
  23         "DSDT",         /* Signature */
  24         0x02,           /* DSDT Revision, needs to be 2 for 64bit */
  25         "AMD   ",       /* OEMID */
  26         "H8QGI   ",     /* TABLE ID */
  27         0x00010001      /* OEM Revision */
  28         )
  29 {       /* Start of ASL file */
  30         /* #include <arch/x86/acpi/debug.asl> */ /* Include global debug methods if needed */
  31
  32         /* Data to be patched by the BIOS during POST */
  33         /* FIXME the patching is not done yet! */
  34         /* Memory related values */
  35         Name(LOMH, 0x0) /* Start of unused memory in C0000-E0000 range */
  36         Name(PBAD, 0x0) /* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
  37         Name(PBLN, 0x0) /* Length of BIOS area */
  38
  39         Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)  /* Base address of PCIe config space */
  40         Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
  41
  42         Name(HPBA, 0xFED00000)  /* Base address of HPET table */
  43         Name(SSFG, 0x0D)        /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
  44
  45         /* USB overcurrent mapping pins.   */
  46         Name(UOM0, 0)
  47         Name(UOM1, 2)
  48         Name(UOM2, 0)
  49         Name(UOM3, 7)
  50         Name(UOM4, 2)
  51         Name(UOM5, 2)
  52         Name(UOM6, 6)
  53         Name(UOM7, 2)
  54         Name(UOM8, 6)
  55         Name(UOM9, 6)
  56
  57         /* Some global data */
  58         Name(OSTP, 3)           /* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
  59         Name(OSV, Ones) /* Assume nothing */
  60         Name(PMOD, One) /* Assume APIC */
  61
  62         /*
  63          * Processor Object
  64          *
  65          */
  66         Scope (\_PR) {          /* define processor scope */
  67                 Processor(
  68                         P000,           /* name space name */
  69                         0x00,           /* Unique number for this processor */
  70                         0x810,          /* PBLK system I/O address !hardcoded! */
  71                         0x06            /* PBLKLEN for boot processor */
  72                         ) {
  73                         //#include "acpi/cpstate.asl"
  74                 }
  75                 Processor(P001, 0x01, 0x00000000, 0x00) {}
  76                 Processor(P002, 0x02, 0x00000000, 0x00) {}
  77                 Processor(P003, 0x03, 0x00000000, 0x00) {}
  78                 Processor(P004, 0x04, 0x00000000, 0x00) {}
  79                 Processor(P005, 0x05, 0x00000000, 0x00) {}
  80                 Processor(P006, 0x06, 0x00000000, 0x00) {}
  81                 Processor(P007, 0x07, 0x00000000, 0x00) {}
  82                 Processor(P008, 0x08, 0x00000000, 0x00) {}
  83                 Processor(P009, 0x09, 0x00000000, 0x00) {}
  84                 Processor(P00A, 0x0A, 0x00000000, 0x00) {}
  85                 Processor(P00B, 0x0B, 0x00000000, 0x00) {}
  86                 Processor(P00C, 0x0C, 0x00000000, 0x00) {}
  87                 Processor(P00D, 0x0D, 0x00000000, 0x00) {}
  88                 Processor(P00E, 0x0E, 0x00000000, 0x00) {}
  89                 Processor(P00F, 0x0F, 0x00000000, 0x00) {}
  90                 Processor(P010, 0x10, 0x00000000, 0x00) {}
  91                 Processor(P011, 0x11, 0x00000000, 0x00) {}
  92                 Processor(P012, 0x12, 0x00000000, 0x00) {}
  93                 Processor(P013, 0x13, 0x00000000, 0x00) {}
  94                 Processor(P014, 0x14, 0x00000000, 0x00) {}
  95                 Processor(P015, 0x15, 0x00000000, 0x00) {}
  96                 Processor(P016, 0x16, 0x00000000, 0x00) {}
  97                 Processor(P017, 0x17, 0x00000000, 0x00) {}
  98                 Processor(P018, 0x18, 0x00000000, 0x00) {}
  99                 Processor(P019, 0x19, 0x00000000, 0x00) {}
 100                 Processor(P01A, 0x1A, 0x00000000, 0x00) {}
 101                 Processor(P01B, 0x1B, 0x00000000, 0x00) {}
 102                 Processor(P01C, 0x1C, 0x00000000, 0x00) {}
 103                 Processor(P01D, 0x1D, 0x00000000, 0x00) {}
 104                 Processor(P01E, 0x1E, 0x00000000, 0x00) {}
 105                 Processor(P01F, 0x1F, 0x00000000, 0x00) {}
 106                 Processor(P020, 0x20, 0x00000000, 0x00) {}
 107                 Processor(P021, 0x21, 0x00000000, 0x00) {}
 108                 Processor(P022, 0x22, 0x00000000, 0x00) {}
 109                 Processor(P023, 0x23, 0x00000000, 0x00) {}
 110                 Processor(P024, 0x24, 0x00000000, 0x00) {}
 111                 Processor(P025, 0x25, 0x00000000, 0x00) {}
 112                 Processor(P026, 0x26, 0x00000000, 0x00) {}
 113                 Processor(P027, 0x27, 0x00000000, 0x00) {}
 114                 Processor(P028, 0x28, 0x00000000, 0x00) {}
 115                 Processor(P029, 0x29, 0x00000000, 0x00) {}
 116                 Processor(P02A, 0x2A, 0x00000000, 0x00) {}
 117                 Processor(P02B, 0x2B, 0x00000000, 0x00) {}
 118                 Processor(P02C, 0x2C, 0x00000000, 0x00) {}
 119                 Processor(P02D, 0x2D, 0x00000000, 0x00) {}
 120                 Processor(P02E, 0x2E, 0x00000000, 0x00) {}
 121                 Processor(P02F, 0x2F, 0x00000000, 0x00) {}
 122                 Alias (P000, CPU0)
 123                 Alias (P001, CPU1)
 124                 Alias (P002, CPU2)
 125                 Alias (P003, CPU3)
 126                 Alias (P004, CPU4)
 127                 Alias (P005, CPU5)
 128                 Alias (P006, CPU6)
 129                 Alias (P007, CPU7)
 130                 Alias (P008, CPU8)
 131         } /* End _PR scope */
 132
 133         /* PIC IRQ mapping registers, C00h-C01h */
 134         OperationRegion(PRQM, SystemIO, 0x00000C00, 0x00000002)
 135                 Field(PRQM, ByteAcc, NoLock, Preserve) {
 136                 PRQI, 0x00000008,
 137                 PRQD, 0x00000008,  /* Offset: 1h */
 138         }
 139         IndexField(PRQI, PRQD, ByteAcc, NoLock, Preserve) {
 140                 PINA, 0x00000008,       /* Index 0 */
 141                 PINB, 0x00000008,       /* Index 1 */
 142                 PINC, 0x00000008,       /* Index 2 */
 143                 PIND, 0x00000008,       /* Index 3 */
 144                 AINT, 0x00000008,       /* Index 4 */
 145                 SINT, 0x00000008,       /* Index 5 */
 146                     , 0x00000008,       /* Index 6 */
 147                 AAUD, 0x00000008,       /* Index 7 */
 148                 AMOD, 0x00000008,       /* Index 8 */
 149                 PINE, 0x00000008,       /* Index 9 */
 150                 PINF, 0x00000008,       /* Index A */
 151                 PING, 0x00000008,       /* Index B */
 152                 PINH, 0x00000008,       /* Index C */
 153         }
 154
 155         /* PCI Error control register */
 156         OperationRegion(PERC, SystemIO, 0x00000C14, 0x00000001)
 157                 Field(PERC, ByteAcc, NoLock, Preserve) {
 158                 SENS, 0x00000001,
 159                 PENS, 0x00000001,
 160                 SENE, 0x00000001,
 161                 PENE, 0x00000001,
 162         }
 163
 164         /* Client Management index/data registers */
 165         OperationRegion(CMT, SystemIO, 0x00000C50, 0x00000002)
 166                 Field(CMT, ByteAcc, NoLock, Preserve) {
 167                 CMTI, 8,
 168                 /* Client Management Data register */
 169                 G64E, 1,
 170                 G64O, 1,
 171                 G32O, 2,
 172                     , 2,
 173                 GPSL, 2,
 174         }
 175
 176         /* GPM Port register */
 177         OperationRegion(GPT, SystemIO, 0x00000C52, 0x00000001)
 178                 Field(GPT, ByteAcc, NoLock, Preserve) {
 179                 GPB0,1,
 180                 GPB1,1,
 181                 GPB2,1,
 182                 GPB3,1,
 183                 GPB4,1,
 184                 GPB5,1,
 185                 GPB6,1,
 186                 GPB7,1,
 187         }
 188
 189         /* Flash ROM program enable register */
 190         OperationRegion(FRE, SystemIO, 0x00000C6F, 0x00000001)
 191                 Field(FRE, ByteAcc, NoLock, Preserve) {
 192                     , 0x00000006,
 193                 FLRE, 0x00000001,
 194         }
 195
 196         /* PM2 index/data registers */
 197         OperationRegion(PM2R, SystemIO, 0x00000CD0, 0x00000002)
 198                 Field(PM2R, ByteAcc, NoLock, Preserve) {
 199                 PM2I, 0x00000008,
 200                 PM2D, 0x00000008,
 201         }
 202
 203         /* Power Management I/O registers */
 204         OperationRegion(PIOR, SystemIO, 0x00000CD6, 0x00000002)
 205                 Field(PIOR, ByteAcc, NoLock, Preserve) {
 206                 PIOI, 0x00000008,
 207                 PIOD, 0x00000008,
 208         }
 209         IndexField (PIOI, PIOD, ByteAcc, NoLock, Preserve) {
 210                 Offset(0x00),   /* MiscControl */
 211                 , 1,
 212                 T1EE, 1,
 213                 T2EE, 1,
 214                 Offset(0x01),   /* MiscStatus */
 215                 , 1,
 216                 T1E, 1,
 217                 T2E, 1,
 218                 Offset(0x04),   /* SmiWakeUpEventEnable3 */
 219                 , 7,
 220                 SSEN, 1,
 221                 Offset(0x07),   /* SmiWakeUpEventStatus3 */
 222                 , 7,
 223                 CSSM, 1,
 224                 Offset(0x10),   /* AcpiEnable */
 225                 , 6,
 226                 PWDE, 1,
 227                 Offset(0x1C),   /* ProgramIoEnable */
 228                 , 3,
 229                 MKME, 1,
 230                 IO3E, 1,
 231                 IO2E, 1,
 232                 IO1E, 1,
 233                 IO0E, 1,
 234                 Offset(0x1D),   /* IOMonitorStatus */
 235                 , 3,
 236                 MKMS, 1,
 237                 IO3S, 1,
 238                 IO2S, 1,
 239                 IO1S, 1,
 240                 IO0S,1,
 241                 Offset(0x20),   /* AcpiPmEvtBlk */
 242                 APEB, 16,
 243                 Offset(0x36),   /* GEvtLevelConfig */
 244                 , 6,
 245                 ELC6, 1,
 246                 ELC7, 1,
 247                 Offset(0x37),   /* GPMLevelConfig0 */
 248                 , 3,
 249                 PLC0, 1,
 250                 PLC1, 1,
 251                 PLC2, 1,
 252                 PLC3, 1,
 253                 PLC8, 1,
 254                 Offset(0x38),   /* GPMLevelConfig1 */
 255                 , 1,
 256                  PLC4, 1,
 257                  PLC5, 1,
 258                 , 1,
 259                  PLC6, 1,
 260                  PLC7, 1,
 261                 Offset(0x3B),   /* PMEStatus1 */
 262                 GP0S, 1,
 263                 GM4S, 1,
 264                 GM5S, 1,
 265                 APS, 1,
 266                 GM6S, 1,
 267                 GM7S, 1,
 268                 GP2S, 1,
 269                 STSS, 1,
 270                 Offset(0x55),   /* SoftPciRst */
 271                 SPRE, 1,
 272                 , 1,
 273                 , 1,
 274                 PNAT, 1,
 275                 PWMK, 1,
 276                 PWNS, 1,
 277
 278                 /*      Offset(0x61), */        /*  Options_1 */
 279                 /*              ,7,  */
 280                 /*              R617,1, */
 281
 282                 Offset(0x65),   /* UsbPMControl */
 283                 , 4,
 284                 URRE, 1,
 285                 Offset(0x68),   /* MiscEnable68 */
 286                 , 3,
 287                 TMTE, 1,
 288                 , 1,
 289                 Offset(0x92),   /* GEVENTIN */
 290                 , 7,
 291                 E7IS, 1,
 292                 Offset(0x96),   /* GPM98IN */
 293                 G8IS, 1,
 294                 G9IS, 1,
 295                 Offset(0x9A),   /* EnhanceControl */
 296                 ,7,
 297                 HPDE, 1,
 298                 Offset(0xA8),   /* PIO7654Enable */
 299                 IO4E, 1,
 300                 IO5E, 1,
 301                 IO6E, 1,
 302                 IO7E, 1,
 303                 Offset(0xA9),   /* PIO7654Status */
 304                 IO4S, 1,
 305                 IO5S, 1,
 306                 IO6S, 1,
 307                 IO7S, 1,
 308         }
 309
 310         /* PM1 Event Block
 311         * First word is PM1_Status, Second word is PM1_Enable
 312         */
 313         OperationRegion(P1EB, SystemIO, APEB, 0x04)
 314                 Field(P1EB, ByteAcc, NoLock, Preserve) {
 315                 TMST, 1,
 316                 ,    3,
 317                 BMST,    1,
 318                 GBST,   1,
 319                 Offset(0x01),
 320                 PBST, 1,
 321                 , 1,
 322                 RTST, 1,
 323                 , 3,
 324                 PWST, 1,
 325                 SPWS, 1,
 326                 Offset(0x02),
 327                 TMEN, 1,
 328                 , 4,
 329                 GBEN, 1,
 330                 Offset(0x03),
 331                 PBEN, 1,
 332                 , 1,
 333                 RTEN, 1,
 334                 , 3,
 335                 PWDA, 1,
 336         }
 337
 338         OperationRegion (GRAM, SystemMemory, 0x0400, 0x0100)
 339                 Field (GRAM, ByteAcc, Lock, Preserve)
 340                 {
 341                         Offset (0x10),
 342                         FLG0,   8
 343                 }
 344
 345         Scope(\_SB) {
 346                 /* PCIe Configuration Space for CONFIG_MMCONF_BUS_NUMBER busses */
 347                 OperationRegion(PCFG, SystemMemory, PCBA, PCLN)
 348                         Field(PCFG, ByteAcc, NoLock, Preserve) {
 349                         /* Byte offsets are computed using the following technique:
 350                          * ((bus number + 1) * ((device number * 8) * 4096)) + register offset
 351                          * The 8 comes from 8 functions per device, and 4096 bytes per function config space
 352                         */
 353                         Offset(0x00088024),     /* Byte offset to SATA register 24h - Bus 0, Device 17, Function 0 */
 354                         STB5, 32,
 355                         Offset(0x00098042),     /* Byte offset to OHCI0 register 42h - Bus 0, Device 19, Function 0 */
 356                         PT0D, 1,
 357                         PT1D, 1,
 358                         PT2D, 1,
 359                         PT3D, 1,
 360                         PT4D, 1,
 361                         PT5D, 1,
 362                         PT6D, 1,
 363                         PT7D, 1,
 364                         PT8D, 1,
 365                         PT9D, 1,
 366                         Offset(0x000A0004),     /* Byte offset to SMBUS register 4h - Bus 0, Device 20, Function 0 */
 367                         SBIE, 1,
 368                         SBME, 1,
 369                         Offset(0x000A0008),     /* Byte offset to SMBUS register 8h - Bus 0, Device 20, Function 0 */
 370                         SBRI, 8,
 371                         Offset(0x000A0014),     /* Byte offset to SMBUS register 14h - Bus 0, Device 20, Function 0 */
 372                         SBB1, 32,
 373                         Offset(0x000A0078),     /* Byte offset to SMBUS register 78h - Bus 0, Device 20, Function 0 */
 374                         ,14,
 375                         P92E, 1,                /* Port92 decode enable */
 376                 }
 377
 378                 OperationRegion(SB5, SystemMemory, STB5, 0x1000)
 379                         Field(SB5, AnyAcc, NoLock, Preserve){
 380                         /* Port 0 */
 381                         Offset(0x120),          /* Port 0 Task file status */
 382                         P0ER, 1,
 383                         , 2,
 384                         P0DQ, 1,
 385                         , 3,
 386                         P0BY, 1,
 387                         Offset(0x128),          /* Port 0 Serial ATA status */
 388                         P0DD, 4,
 389                         , 4,
 390                         P0IS, 4,
 391                         Offset(0x12C),          /* Port 0 Serial ATA control */
 392                         P0DI, 4,
 393                         Offset(0x130),          /* Port 0 Serial ATA error */
 394                         , 16,
 395                         P0PR, 1,
 396
 397                         /* Port 1 */
 398                         offset(0x1A0),          /* Port 1 Task file status */
 399                         P1ER, 1,
 400                         , 2,
 401                         P1DQ, 1,
 402                         , 3,
 403                         P1BY, 1,
 404                         Offset(0x1A8),          /* Port 1 Serial ATA status */
 405                         P1DD, 4,
 406                         , 4,
 407                         P1IS, 4,
 408                         Offset(0x1AC),          /* Port 1 Serial ATA control */
 409                         P1DI, 4,
 410                         Offset(0x1B0),          /* Port 1 Serial ATA error */
 411                         , 16,
 412                         P1PR, 1,
 413
 414                         /* Port 2 */
 415                         Offset(0x220),          /* Port 2 Task file status */
 416                         P2ER, 1,
 417                         , 2,
 418                         P2DQ, 1,
 419                         , 3,
 420                         P2BY, 1,
 421                         Offset(0x228),          /* Port 2 Serial ATA status */
 422                         P2DD, 4,
 423                         , 4,
 424                         P2IS, 4,
 425                         Offset(0x22C),          /* Port 2 Serial ATA control */
 426                         P2DI, 4,
 427                         Offset(0x230),          /* Port 2 Serial ATA error */
 428                         , 16,
 429                         P2PR, 1,
 430
 431                         /* Port 3 */
 432                         Offset(0x2A0),          /* Port 3 Task file status */
 433                         P3ER, 1,
 434                         , 2,
 435                         P3DQ, 1,
 436                         , 3,
 437                         P3BY, 1,
 438                         Offset(0x2A8),          /* Port 3 Serial ATA status */
 439                         P3DD, 4,
 440                         , 4,
 441                         P3IS, 4,
 442                         Offset(0x2AC),          /* Port 3 Serial ATA control */
 443                         P3DI, 4,
 444                         Offset(0x2B0),          /* Port 3 Serial ATA error */
 445                         , 16,
 446                         P3PR, 1,
 447                 }
 448         }
 449
 450         #include "acpi/routing.asl"
 451
 452         Scope(\_SB) {
 453                 Method(CkOT, 0){
 454                         if(LNotEqual(OSTP, Ones)) {Return(OSTP)}        /* OS version was already detected */
 455                         if(CondRefOf(\_OSI,Local1))
 456                         {
 457                                 Store(1, OSTP)                  /* Assume some form of XP */
 458                                 if (\_OSI("Windows 2006"))      /* Vista */
 459                                 {
 460                                         Store(2, OSTP)
 461                                 }
 462                         } else {
 463                                 If(WCMP(\_OS,"Linux")) {
 464                                         Store(3, OSTP)          /* Linux */
 465                                 } Else {
 466                                         Store(4, OSTP)          /* Gotta be WinCE */
 467                                 }
 468                         }
 469                         Return(OSTP)
 470                 }
 471
 472                 Method(_PIC, 0x01, NotSerialized)
 473                 {
 474                         If (Arg0)
 475                         {
 476                                 \_SB.CIRQ()
 477                         }
 478                         Store(Arg0, PMOD)
 479                 }
 480                 Method(CIRQ, 0x00, NotSerialized){
 481                         Store(0, PINA)
 482                         Store(0, PINB)
 483                         Store(0, PINC)
 484                         Store(0, PIND)
 485                         Store(0, PINE)
 486                         Store(0, PINF)
 487                         Store(0, PING)
 488                         Store(0, PINH)
 489                 }
 490
 491                 Name(IRQB, ResourceTemplate(){
 492                         IRQ(Level,ActiveLow,Shared){15}
 493                 })
 494
 495                 Name(IRQP, ResourceTemplate(){
 496                         IRQ(Level,ActiveLow,Exclusive){3, 4, 5, 7, 10, 11, 12, 15}
 497                 })
 498
 499                 Name(PITF, ResourceTemplate(){
 500                         IRQ(Level,ActiveLow,Exclusive){9}
 501                 })
 502
 503                 Device(INTA) {
 504                         Name(_HID, EISAID("PNP0C0F"))
 505                         Name(_UID, 1)
 506
 507                         Method(_STA, 0) {
 508                                 if (PINA) {
 509                                         Return(0x0B) /* sata is invisible */
 510                                 } else {
 511                                         Return(0x09) /* sata is disabled */
 512                                 }
 513                         } /* End Method(_SB.INTA._STA) */
 514
 515                         Method(_DIS ,0) {
 516                                 /* DBGO("\\_SB\\LNKA\\_DIS\n") */
 517                                 Store(0, PINA)
 518                         } /* End Method(_SB.INTA._DIS) */
 519
 520                         Method(_PRS ,0) {
 521                                 /* DBGO("\\_SB\\LNKA\\_PRS\n") */
 522                                 Return(IRQP)
 523                         } /* Method(_SB.INTA._PRS) */
 524
 525                         Method(_CRS ,0) {
 526                                 /* DBGO("\\_SB\\LNKA\\_CRS\n") */
 527                                 CreateWordField(IRQB, 0x1, IRQN)
 528                                 ShiftLeft(1, PINA, IRQN)
 529                                 Return(IRQB)
 530                         } /* Method(_SB.INTA._CRS) */
 531
 532                         Method(_SRS, 1) {
 533                                 /* DBGO("\\_SB\\LNKA\\_CRS\n") */
 534                                 CreateWordField(ARG0, 1, IRQM)
 535
 536                                 /* Use lowest available IRQ */
 537                                 FindSetRightBit(IRQM, Local0)
 538                                 if (Local0) {
 539                                         Decrement(Local0)
 540                                 }
 541                                 Store(Local0, PINA)
 542                         } /* End Method(_SB.INTA._SRS) */
 543                 } /* End Device(INTA) */
 544
 545                 Device(INTB) {
 546                         Name(_HID, EISAID("PNP0C0F"))
 547                         Name(_UID, 2)
 548
 549                         Method(_STA, 0) {
 550                                 if (PINB) {
 551                                         Return(0x0B) /* sata is invisible */
 552                                 } else {
 553                                         Return(0x09) /* sata is disabled */
 554                                 }
 555                         } /* End Method(_SB.INTB._STA) */
 556
 557                         Method(_DIS ,0) {
 558                                 /* DBGO("\\_SB\\LNKB\\_DIS\n") */
 559                                 Store(0, PINB)
 560                         } /* End Method(_SB.INTB._DIS) */
 561
 562                         Method(_PRS ,0) {
 563                                 /* DBGO("\\_SB\\LNKB\\_PRS\n") */
 564                                 Return(IRQP)
 565                         } /* Method(_SB.INTB._PRS) */
 566
 567                         Method(_CRS ,0) {
 568                                 /* DBGO("\\_SB\\LNKB\\_CRS\n") */
 569                                 CreateWordField(IRQB, 0x1, IRQN)
 570                                 ShiftLeft(1, PINB, IRQN)
 571                                 Return(IRQB)
 572                         } /* Method(_SB.INTB._CRS) */
 573
 574                         Method(_SRS, 1) {
 575                                 /* DBGO("\\_SB\\LNKB\\_CRS\n") */
 576                                 CreateWordField(ARG0, 1, IRQM)
 577
 578                                 /* Use lowest available IRQ */
 579                                 FindSetRightBit(IRQM, Local0)
 580                                 if (Local0) {
 581                                         Decrement(Local0)
 582                                 }
 583                                 Store(Local0, PINB)
 584                         } /* End Method(_SB.INTB._SRS) */
 585                 } /* End Device(INTB)  */
 586
 587                 Device(INTC) {
 588                         Name(_HID, EISAID("PNP0C0F"))
 589                         Name(_UID, 3)
 590
 591                         Method(_STA, 0) {
 592                                 if (PINC) {
 593                                         Return(0x0B) /* sata is invisible */
 594                                 } else {
 595                                         Return(0x09) /* sata is disabled */
 596                                 }
 597                         } /* End Method(_SB.INTC._STA) */
 598
 599                         Method(_DIS ,0) {
 600                                 /* DBGO("\\_SB\\LNKC\\_DIS\n") */
 601                                 Store(0, PINC)
 602                         } /* End Method(_SB.INTC._DIS) */
 603
 604                         Method(_PRS ,0) {
 605                                 /* DBGO("\\_SB\\LNKC\\_PRS\n") */
 606                                 Return(IRQP)
 607                         } /* Method(_SB.INTC._PRS) */
 608
 609                         Method(_CRS ,0) {
 610                                 /* DBGO("\\_SB\\LNKC\\_CRS\n") */
 611                                 CreateWordField(IRQB, 0x1, IRQN)
 612                                 ShiftLeft(1, PINC, IRQN)
 613                                 Return(IRQB)
 614                         } /* Method(_SB.INTC._CRS) */
 615
 616                         Method(_SRS, 1) {
 617                                 /* DBGO("\\_SB\\LNKC\\_CRS\n") */
 618                                 CreateWordField(ARG0, 1, IRQM)
 619
 620                                 /* Use lowest available IRQ */
 621                                 FindSetRightBit(IRQM, Local0)
 622                                 if (Local0) {
 623                                         Decrement(Local0)
 624                                 }
 625                                 Store(Local0, PINC)
 626                         } /* End Method(_SB.INTC._SRS) */
 627                 } /* End Device(INTC)  */
 628
 629                 Device(INTD) {
 630                         Name(_HID, EISAID("PNP0C0F"))
 631                         Name(_UID, 4)
 632
 633                         Method(_STA, 0) {
 634                                 if (PIND) {
 635                                         Return(0x0B) /* sata is invisible */
 636                                 } else {
 637                                         Return(0x09) /* sata is disabled */
 638                                 }
 639                         } /* End Method(_SB.INTD._STA) */
 640
 641                         Method(_DIS ,0) {
 642                                 /* DBGO("\\_SB\\LNKD\\_DIS\n") */
 643                                 Store(0, PIND)
 644                         } /* End Method(_SB.INTD._DIS) */
 645
 646                         Method(_PRS ,0) {
 647                                 /* DBGO("\\_SB\\LNKD\\_PRS\n") */
 648                                 Return(IRQP)
 649                         } /* Method(_SB.INTD._PRS) */
 650
 651                         Method(_CRS ,0) {
 652                                 /* DBGO("\\_SB\\LNKD\\_CRS\n") */
 653                                 CreateWordField(IRQB, 0x1, IRQN)
 654                                 ShiftLeft(1, PIND, IRQN)
 655                                 Return(IRQB)
 656                         } /* Method(_SB.INTD._CRS) */
 657
 658                         Method(_SRS, 1) {
 659                                 /* DBGO("\\_SB\\LNKD\\_CRS\n") */
 660                                 CreateWordField(ARG0, 1, IRQM)
 661
 662                                 /* Use lowest available IRQ */
 663                                 FindSetRightBit(IRQM, Local0)
 664                                 if (Local0) {
 665                                         Decrement(Local0)
 666                                 }
 667                                 Store(Local0, PIND)
 668                         } /* End Method(_SB.INTD._SRS) */
 669                 } /* End Device(INTD)  */
 670
 671                 Device(INTE) {
 672                         Name(_HID, EISAID("PNP0C0F"))
 673                         Name(_UID, 5)
 674
 675                         Method(_STA, 0) {
 676                                 if (PINE) {
 677                                         Return(0x0B) /* sata is invisible */
 678                                 } else {
 679                                         Return(0x09) /* sata is disabled */
 680                                 }
 681                         } /* End Method(_SB.INTE._STA) */
 682
 683                         Method(_DIS ,0) {
 684                                 /* DBGO("\\_SB\\LNKE\\_DIS\n") */
 685                                 Store(0, PINE)
 686                         } /* End Method(_SB.INTE._DIS) */
 687
 688                         Method(_PRS ,0) {
 689                                 /* DBGO("\\_SB\\LNKE\\_PRS\n") */
 690                                 Return(IRQP)
 691                         } /* Method(_SB.INTE._PRS) */
 692
 693                         Method(_CRS ,0) {
 694                                 /* DBGO("\\_SB\\LNKE\\_CRS\n") */
 695                                 CreateWordField(IRQB, 0x1, IRQN)
 696                                 ShiftLeft(1, PINE, IRQN)
 697                                 Return(IRQB)
 698                         } /* Method(_SB.INTE._CRS) */
 699
 700                         Method(_SRS, 1) {
 701                                 /* DBGO("\\_SB\\LNKE\\_CRS\n") */
 702                                 CreateWordField(ARG0, 1, IRQM)
 703
 704                                 /* Use lowest available IRQ */
 705                                 FindSetRightBit(IRQM, Local0)
 706                                 if (Local0) {
 707                                         Decrement(Local0)
 708                                 }
 709                                 Store(Local0, PINE)
 710                         } /* End Method(_SB.INTE._SRS) */
 711                 } /* End Device(INTE)  */
 712
 713                 Device(INTF) {
 714                         Name(_HID, EISAID("PNP0C0F"))
 715                         Name(_UID, 6)
 716
 717                         Method(_STA, 0) {
 718                                 if (PINF) {
 719                                         Return(0x0B) /* sata is invisible */
 720                                 } else {
 721                                         Return(0x09) /* sata is disabled */
 722                                 }
 723                         } /* End Method(_SB.INTF._STA) */
 724
 725                         Method(_DIS ,0) {
 726                                 /* DBGO("\\_SB\\LNKF\\_DIS\n") */
 727                                 Store(0, PINF)
 728                         } /* End Method(_SB.INTF._DIS) */
 729
 730                         Method(_PRS ,0) {
 731                                 /* DBGO("\\_SB\\LNKF\\_PRS\n") */
 732                                 Return(PITF)
 733                         } /* Method(_SB.INTF._PRS) */
 734
 735                         Method(_CRS ,0) {
 736                                 /* DBGO("\\_SB\\LNKF\\_CRS\n") */
 737                                 CreateWordField(IRQB, 0x1, IRQN)
 738                                 ShiftLeft(1, PINF, IRQN)
 739                                 Return(IRQB)
 740                         } /* Method(_SB.INTF._CRS) */
 741
 742                         Method(_SRS, 1) {
 743                                 /* DBGO("\\_SB\\LNKF\\_CRS\n") */
 744                                 CreateWordField(ARG0, 1, IRQM)
 745
 746                                 /* Use lowest available IRQ */
 747                                 FindSetRightBit(IRQM, Local0)
 748                                 if (Local0) {
 749                                         Decrement(Local0)
 750                                 }
 751                                 Store(Local0, PINF)
 752                         } /*  End Method(_SB.INTF._SRS) */
 753                 } /* End Device(INTF)  */
 754
 755                 Device(INTG) {
 756                         Name(_HID, EISAID("PNP0C0F"))
 757                         Name(_UID, 7)
 758
 759                         Method(_STA, 0) {
 760                                 if (PING) {
 761                                         Return(0x0B) /* sata is invisible */
 762                                 } else {
 763                                         Return(0x09) /* sata is disabled */
 764                                 }
 765                         } /* End Method(_SB.INTG._STA)  */
 766
 767                         Method(_DIS ,0) {
 768                                 /* DBGO("\\_SB\\LNKG\\_DIS\n") */
 769                                 Store(0, PING)
 770                         } /* End Method(_SB.INTG._DIS)  */
 771
 772                         Method(_PRS ,0) {
 773                                 /* DBGO("\\_SB\\LNKG\\_PRS\n") */
 774                                 Return(IRQP)
 775                         } /* Method(_SB.INTG._CRS)  */
 776
 777                         Method(_CRS ,0) {
 778                                 /* DBGO("\\_SB\\LNKG\\_CRS\n") */
 779                                 CreateWordField(IRQB, 0x1, IRQN)
 780                                 ShiftLeft(1, PING, IRQN)
 781                                 Return(IRQB)
 782                         } /* Method(_SB.INTG._CRS)  */
 783
 784                         Method(_SRS, 1) {
 785                                 /* DBGO("\\_SB\\LNKG\\_CRS\n") */
 786                                 CreateWordField(ARG0, 1, IRQM)
 787
 788                                 /* Use lowest available IRQ */
 789                                 FindSetRightBit(IRQM, Local0)
 790                                 if (Local0) {
 791                                         Decrement(Local0)
 792                                 }
 793                                 Store(Local0, PING)
 794                         } /* End Method(_SB.INTG._SRS)  */
 795                 } /* End Device(INTG)  */
 796
 797                 Device(INTH) {
 798                         Name(_HID, EISAID("PNP0C0F"))
 799                         Name(_UID, 8)
 800
 801                         Method(_STA, 0) {
 802                                 if (PINH) {
 803                                         Return(0x0B) /* sata is invisible */
 804                                 } else {
 805                                         Return(0x09) /* sata is disabled */
 806                                 }
 807                         } /* End Method(_SB.INTH._STA)  */
 808
 809                         Method(_DIS ,0) {
 810                                 /* DBGO("\\_SB\\LNKH\\_DIS\n") */
 811                                 Store(0, PINH)
 812                         } /* End Method(_SB.INTH._DIS)  */
 813
 814                         Method(_PRS ,0) {
 815                                 /* DBGO("\\_SB\\LNKH\\_PRS\n") */
 816                                 Return(IRQP)
 817                         } /* Method(_SB.INTH._CRS)  */
 818
 819                         Method(_CRS ,0) {
 820                                 /* DBGO("\\_SB\\LNKH\\_CRS\n") */
 821                                 CreateWordField(IRQB, 0x1, IRQN)
 822                                 ShiftLeft(1, PINH, IRQN)
 823                                 Return(IRQB)
 824                         } /* Method(_SB.INTH._CRS)  */
 825
 826                         Method(_SRS, 1) {
 827                                 /* DBGO("\\_SB\\LNKH\\_CRS\n") */
 828                                 CreateWordField(ARG0, 1, IRQM)
 829
 830                                 /* Use lowest available IRQ */
 831                                 FindSetRightBit(IRQM, Local0)
 832                                 if (Local0) {
 833                                         Decrement(Local0)
 834                                 }
 835                                 Store(Local0, PINH)
 836                         } /* End Method(_SB.INTH._SRS)  */
 837                 } /* End Device(INTH)   */
 838
 839         }   /* End Scope(_SB)  */
 840
 841
 842         /* Supported sleep states: */
 843         Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} )        /* (S0) - working state */
 844
 845         If (LAnd(SSFG, 0x01)) {
 846                 Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} )        /* (S1) - sleeping w/CPU context */
 847         }
 848         If (LAnd(SSFG, 0x02)) {
 849                 Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} )        /* (S2) - "light" Suspend to RAM */
 850         }
 851         If (LAnd(SSFG, 0x04)) {
 852                 Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} )        /* (S3) - Suspend to RAM */
 853         }
 854         If (LAnd(SSFG, 0x08)) {
 855                 Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} )        /* (S4) - Suspend to Disk */
 856         }
 857
 858         Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} )        /* (S5) - Soft Off */
 859
 860         Name(\_SB.CSPS ,0)                              /* Current Sleep State (S0, S1, S2, S3, S4, S5) */
 861         Name(CSMS, 0)                   /* Current System State */
 862
 863         /* Wake status package */
 864         Name(WKST,Package(){Zero, Zero})
 865
 866         /*
 867         * \_PTS - Prepare to Sleep method
 868         *
 869         *       Entry:
 870         *               Arg0=The value of the sleeping state S1=1, S2=2, etc
 871         *
 872         * Exit:
 873         *               -none-
 874         *
 875         * The _PTS control method is executed at the beginning of the sleep process
 876         * for S1-S5. The sleeping value is passed to the _PTS control method.   This
 877         * control method may be executed a relatively long time before entering the
 878         * sleep state and the OS may abort      the operation without notification to
 879         * the ACPI driver.  This method cannot modify the configuration or power
 880         * state of any device in the system.
 881         */
 882         Method(\_PTS, 1) {
 883                 /* DBGO("\\_PTS\n") */
 884                 /* DBGO("From S0 to S") */
 885                 /* DBGO(Arg0) */
 886                 /* DBGO("\n") */
 887
 888                 /* Don't allow PCIRST# to reset USB */
 889                 if (LEqual(Arg0,3)){
 890                         Store(0,URRE)
 891                 }
 892
 893                 /* Clear sleep SMI status flag and enable sleep SMI trap. */
 894                 /*Store(One, CSSM)
 895                 Store(One, SSEN)*/
 896
 897                 /* On older chips, clear PciExpWakeDisEn */
 898                 /*if (LLessEqual(\_SB.SBRI, 0x13)) {
 899                 *       Store(0,\_SB.PWDE)
 900                 *}
 901                 */
 902
 903                 /* Clear wake status structure. */
 904                 Store(0, Index(WKST,0))
 905                 Store(0, Index(WKST,1))
 906                 \_SB.PCI0.SIOS (Arg0)
 907         } /* End Method(\_PTS) */
 908
 909         /*
 910         *  The following method results in a "not a valid reserved NameSeg"
 911         *  warning so I have commented it out for the duration.  It isn't
 912         *  used, so it could be removed.
 913         *
 914         *
 915         *       \_GTS OEM Going To Sleep method
 916         *
 917         *       Entry:
 918         *               Arg0=The value of the sleeping state S1=1, S2=2
 919         *
 920         *       Exit:
 921         *               -none-
 922         *
 923         *  Method(\_GTS, 1) {
 924         *  DBGO("\\_GTS\n")
 925         *  DBGO("From S0 to S")
 926         *  DBGO(Arg0)
 927         *  DBGO("\n")
 928         *  }
 929         */
 930
 931         /*
 932         *       \_BFS OEM Back From Sleep method
 933         *
 934         *       Entry:
 935         *               Arg0=The value of the sleeping state S1=1, S2=2
 936         *
 937         *       Exit:
 938         *               -none-
 939         */
 940         Method(\_BFS, 1) {
 941                 /* DBGO("\\_BFS\n") */
 942                 /* DBGO("From S") */
 943                 /* DBGO(Arg0) */
 944                 /* DBGO(" to S0\n") */
 945         }
 946
 947         /*
 948         *  \_WAK System Wake method
 949         *
 950         *       Entry:
 951         *               Arg0=The value of the sleeping state S1=1, S2=2
 952         *
 953         *       Exit:
 954         *               Return package of 2 DWords
 955         *               Dword 1 - Status
 956         *                       0x00000000      wake succeeded
 957         *                       0x00000001      Wake was signaled but failed due to lack of power
 958         *                       0x00000002      Wake was signaled but failed due to thermal condition
 959         *               Dword 2 - Power Supply state
 960         *                       if non-zero the effective S-state the power supply entered
 961         */
 962         Method(\_WAK, 1) {
 963                 /* DBGO("\\_WAK\n") */
 964                 /* DBGO("From S") */
 965                 /* DBGO(Arg0) */
 966                 /* DBGO(" to S0\n") */
 967
 968                 /* Re-enable HPET */
 969                 Store(1,HPDE)
 970
 971                 /* Restore PCIRST# so it resets USB */
 972                 if (LEqual(Arg0,3)){
 973                         Store(1,URRE)
 974                 }
 975
 976                 /* Arbitrarily clear PciExpWakeStatus */
 977                 Store(PWST, PWST)
 978
 979                 /* if(DeRefOf(Index(WKST,0))) {
 980                 *       Store(0, Index(WKST,1))
 981                 * } else {
 982                 *       Store(Arg0, Index(WKST,1))
 983                 * }
 984                 */
 985                 \_SB.PCI0.SIOW (Arg0)
 986                 Return(WKST)
 987         } /* End Method(\_WAK) */
 988
 989         Scope(\_GPE) {  /* Start Scope GPE */
 990                 /*  General event 0  */
 991                 Method(_L00) {
 992                       //DBGO("\\_GPE\\_L00\n")
 993                 }
 994
 995                 /*  General event 1  */
 996                 Method(_L01) {
 997                       //DBGO("\\_GPE\\_L01\n")
 998                 }
 999
1000                 /*  General event 2  */
1001                 Method(_L02) {
1002                       //DBGO("\\_GPE\\_L02\n")
1003                 }
1004
1005                 /*  General event 3  */
1006                 Method(_L03) {
1007                         //DBGO("\\_GPE\\_L00\n")
1008                         Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
1009                 }
1010
1011                 /*  General event 4  */
1012                 Method(_L04) {
1013                       //DBGO("\\_GPE\\_L04\n")
1014                 }
1015
1016                 /*  General event 5  */
1017                 Method(_L05) {
1018                       //DBGO("\\_GPE\\_L05\n")
1019                 }
1020
1021                 /* _L06 General event 6 - Used for GPM6, moved to USB.asl */
1022                 /* _L07 General event 7 - Used for GPM7, moved to USB.asl */
1023
1024                 /*  Legacy PM event  */
1025                 Method(_L08) {
1026                         //DBGO("\\_GPE\\_L08\n")
1027                 }
1028
1029                 /*  Temp warning (TWarn) event  */
1030                 Method(_L09) {
1031                         //DBGO("\\_GPE\\_L09\n")
1032                         Notify (\_TZ.TZ00, 0x80)
1033                 }
1034
1035                 /*  Reserved  */
1036                 Method(_L0A) {
1037                       //DBGO("\\_GPE\\_L0A\n")
1038                 }
1039
1040                 /*  USB controller PME#  */
1041                 Method(_L0B) {
1042                         //DBGO("\\_GPE\\_L0B\n")
1043                         Notify(\_SB.PCI0.UOH1, 0x02) /* NOTIFY_DEVICE_WAKE */
1044                         Notify(\_SB.PCI0.UOH2, 0x02) /* NOTIFY_DEVICE_WAKE */
1045                         Notify(\_SB.PCI0.UOH3, 0x02) /* NOTIFY_DEVICE_WAKE */
1046                         Notify(\_SB.PCI0.UOH4, 0x02) /* NOTIFY_DEVICE_WAKE */
1047                         Notify(\_SB.PCI0.UOH5, 0x02) /* NOTIFY_DEVICE_WAKE */
1048                         Notify(\_SB.PCI0.UEH1, 0x02) /* NOTIFY_DEVICE_WAKE */
1049                         Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
1050                 }
1051
1052                 /*  AC97 controller PME#  */
1053                 Method(_L0C) {
1054                       //DBGO("\\_GPE\\_L0C\n")
1055                 }
1056
1057                 /*  OtherTherm PME#  */
1058                 Method(_L0D) {
1059                       //DBGO("\\_GPE\\_L0D\n")
1060                 }
1061
1062                 /* _L0E GPM9 SCI event - Moved to USB.asl */
1063
1064                 /*  PCIe HotPlug event  */
1065                 Method(_L0F) {
1066                         //DBGO("\\_GPE\\_L0F\n")
1067                 }
1068
1069                 /*  ExtEvent0 SCI event  */
1070                 Method(_L10) {
1071                         //DBGO("\\_GPE\\_L10\n")
1072                 }
1073
1074
1075                 /*  ExtEvent1 SCI event  */
1076                 Method(_L11) {
1077                         //DBGO("\\_GPE\\_L11\n")
1078                 }
1079
1080                 /*  PCIe PME# event  */
1081                 Method(_L12) {
1082                       //DBGO("\\_GPE\\_L12\n")
1083                 }
1084
1085                 /* _L13 GPM0 SCI event - Moved to USB.asl */
1086                 /* _L14 GPM1 SCI event - Moved to USB.asl */
1087                 /* _L15 GPM2 SCI event - Moved to USB.asl */
1088                 /* _L16 GPM3 SCI event - Moved to USB.asl */
1089                 /* _L17 GPM8 SCI event - Moved to USB.asl */
1090
1091                 /*  GPIO0 or GEvent8 event  */
1092                 Method(_L18) {
1093                         //DBGO("\\_GPE\\_L18\n")
1094                         Notify(\_SB.PCI0.PBR2, 0x02) /* NOTIFY_DEVICE_WAKE */
1095                         Notify(\_SB.PCI0.PBR4, 0x02) /* NOTIFY_DEVICE_WAKE */
1096                         Notify(\_SB.PCI0.PBRb, 0x02) /* NOTIFY_DEVICE_WAKE */
1097                         Notify(\_SB.PCI0.PBRc, 0x02) /* NOTIFY_DEVICE_WAKE */
1098                         Notify(\_SB.PCI0.PBRd, 0x02) /* NOTIFY_DEVICE_WAKE */
1099                         Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
1100                 }
1101
1102                 /* _L19 GPM4 SCI event - Moved to USB.asl */
1103                 /* _L1A GPM5 SCI event - Moved to USB.asl */
1104
1105                 /*  Azalia SCI event  */
1106                 Method(_L1B) {
1107                         //DBGO("\\_GPE\\_L1B\n")
1108                         Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */
1109                         Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
1110                 }
1111
1112                 /*  GPM6 SCI event - Reassigned to _L06 */
1113                 Method(_L1C) {
1114                       //DBGO("\\_GPE\\_L1C\n")
1115                 }
1116
1117                 /*  GPM7 SCI event - Reassigned to _L07 */
1118                 Method(_L1D) {
1119                       //DBGO("\\_GPE\\_L1D\n")
1120                 }
1121
1122                 /*  GPIO2 or GPIO66 SCI event  */
1123                 Method(_L1E) {
1124                         //DBGO("\\_GPE\\_L1E\n")
1125                 }
1126
1127                 /* _L1F SATA SCI event - Moved to sata.asl */
1128
1129         }       /* End Scope GPE */
1130
1131         #include "acpi/usb.asl"
1132
1133         /* System Bus */
1134         Scope(\_SB) { /* Start \_SB scope */
1135                 #include <arch/x86/acpi/globutil.asl> /* global utility methods expected within the \_SB scope */
1136
1137                 /*  _SB.PCI0 */
1138                 /* Note: Only need HID on Primary Bus */
1139                 Device(PCI0) {
1140                         External (TOM1) //assigned when update_ssdt()
1141                         External (TOM2) /* (<real tom2> >> 20) to make it fit into 32 bit for XP */
1142
1143                         Name(_HID, EISAID("PNP0A03"))
1144                         Name(_ADR, 0x00180000)  /* Dev# = BSP Dev#, Func# = 0 */
1145                         Method(_BBN, 0) { /* Bus number = 0 */
1146                                 Return(0)
1147                         }
1148                         Method(_STA, 0) {
1149                                 /* DBGO("\\_SB\\PCI0\\_STA\n") */
1150                                 Return(0x0B)     /* Status is visible */
1151                         }
1152
1153                         Method(_PRT,0) {
1154                                 If(PMOD){ Return(APR0) }        /* APIC mode */
1155                                 Return (PR0)                    /* PIC Mode */
1156                         } /* end _PRT */
1157
1158                         /* Describe the Northbridge devices */
1159                         Device(AMRT) {
1160                                 Name(_ADR, 0x00000000)
1161                         } /* end AMRT */
1162
1163                         /* The external GFX bridge */
1164                         Device(PBR2) {
1165                                 Name(_ADR, 0x00020000)
1166                                 Name(_PRW, Package() {0x18, 4})
1167                                 Method(_PRT,0) {
1168                                         If(PMOD){ Return(APS2) }        /* APIC mode */
1169                                         Return (PS2)                    /* PIC Mode */
1170                                 } /* end _PRT */
1171                         } /* end PBR2 */
1172
1173                         /* Dev3 is also an external GFX bridge */
1174
1175                         Device(PBR4) {
1176                                 Name(_ADR, 0x00040000)
1177                                 Name(_PRW, Package() {0x18, 4})
1178                                 Method(_PRT,0) {
1179                                         If(PMOD){ Return(APS4) }        /* APIC mode */
1180                                         Return (PS4)                    /* PIC Mode */
1181                                 } /* end _PRT */
1182                         } /* end PBR4 */
1183
1184                         Device(PBRb) {
1185                                 Name(_ADR, 0x000b0000)
1186                                 Name(_PRW, Package() {0x18, 4})
1187                                 Method(_PRT,0) {
1188                                         If(PMOD){ Return(APSb) }        /* APIC mode */
1189                                         Return (PSb)                    /* PIC Mode */
1190                                 } /* end _PRT */
1191                         } /* end PBRb */
1192
1193                         Device(PBRc) {
1194                                 Name(_ADR, 0x000c0000)
1195                                 Name(_PRW, Package() {0x18, 4})
1196                                 Method(_PRT,0) {
1197                                         If(PMOD){ Return(APSc) }        /* APIC mode */
1198                                         Return (PSc)                    /* PIC Mode */
1199                                 } /* end _PRT */
1200                         } /* end PBRc */
1201
1202                         Device(PBRd) {
1203                                 Name(_ADR, 0x000d0000)
1204                                 Name(_PRW, Package() {0x18, 4})
1205                                 Method(_PRT,0) {
1206                                         If(PMOD){ Return(APSd) }        /* APIC mode */
1207                                         Return (PSd)                    /*  PIC Mode */
1208                                 } /* end _PRT */
1209                         } /* end PBRd */
1210
1211                         /* Describe the Southbridge devices */
1212                         Device(STCR) {
1213                                 Name(_ADR, 0x00110000)
1214                                 #include "acpi/sata.asl"
1215                         } /* end STCR */
1216
1217                         Device(UOH1) {
1218                                 Name(_ADR, 0x00130000)
1219                                 Name(_PRW, Package() {0x0B, 3})
1220                         } /* end UOH1 */
1221
1222                         Device(UOH2) {
1223                                 Name(_ADR, 0x00130001)
1224                                 Name(_PRW, Package() {0x0B, 3})
1225                         } /* end UOH2 */
1226
1227                         Device(UOH3) {
1228                                 Name(_ADR, 0x00130002)
1229                                 Name(_PRW, Package() {0x0B, 3})
1230                         } /* end UOH3 */
1231
1232                         Device(UOH4) {
1233                                 Name(_ADR, 0x00130003)
1234                                 Name(_PRW, Package() {0x0B, 3})
1235                         } /* end UOH4 */
1236
1237                         Device(UOH5) {
1238                                 Name(_ADR, 0x00130004)
1239                                 Name(_PRW, Package() {0x0B, 3})
1240                         } /* end UOH5 */
1241
1242                         Device(UEH1) {
1243                                 Name(_ADR, 0x00130005)
1244                                 Name(_PRW, Package() {0x0B, 3})
1245                         } /* end UEH1 */
1246
1247                         Device(SBUS) {
1248                                 Name(_ADR, 0x00140000)
1249                         } /* end SBUS */
1250
1251                         /* Primary (and only) IDE channel */
1252                         Device(IDEC) {
1253                                 Name(_ADR, 0x00140001)
1254                                 #include "acpi/ide.asl"
1255                         } /* end IDEC */
1256
1257                         Device(AZHD) {
1258                                 Name(_ADR, 0x00140002)
1259                                 OperationRegion(AZPD, PCI_Config, 0x00, 0x100)
1260                                         Field(AZPD, AnyAcc, NoLock, Preserve) {
1261                                         offset (0x42),
1262                                         NSDI, 1,
1263                                         NSDO, 1,
1264                                         NSEN, 1,
1265                                         offset (0x44),
1266                                         IPCR, 4,
1267                                         offset (0x54),
1268                                         PWST, 2,
1269                                         , 6,
1270                                         PMEB, 1,
1271                                         , 6,
1272                                         PMST, 1,
1273                                         offset (0x62),
1274                                         MMCR, 1,
1275                                         offset (0x64),
1276                                         MMLA, 32,
1277                                         offset (0x68),
1278                                         MMHA, 32,
1279                                         offset (0x6C),
1280                                         MMDT, 16,
1281                                 }
1282
1283                                 Method(_INI) {
1284                                         If(LEqual(OSTP,3)){   /* If we are running Linux */
1285                                                 Store(zero, NSEN)
1286                                                 Store(one, NSDO)
1287                                                 Store(one, NSDI)
1288                                         }
1289                                 }
1290                         } /* end AZHD */
1291
1292                         Device(LIBR) {
1293                                 Name(_ADR, 0x00140003)
1294                                 /* Method(_INI) {
1295                                 *       DBGO("\\_SB\\PCI0\\LpcIsaBr\\_INI\n")
1296                                 } */ /* End Method(_SB.SBRDG._INI) */
1297
1298                                 /* Real Time Clock Device */
1299                                 Device(RTC0) {
1300                                         Name(_HID, EISAID("PNP0B00"))   /* AT Real Time Clock (not PIIX4 compatible) */
1301                                         Name(_CRS, ResourceTemplate() {
1302                                                 IRQNoFlags(){8}
1303                                                 IO(Decode16,0x0070, 0x0070, 0, 2)
1304                                                 /* IO(Decode16,0x0070, 0x0070, 0, 4) */
1305                                         })
1306                                 } /* End Device(_SB.PCI0.LpcIsaBr.RTC0) */
1307
1308                                 Device(TMR) {   /* Timer */
1309                                         Name(_HID,EISAID("PNP0100"))    /* System Timer */
1310                                         Name(_CRS, ResourceTemplate() {
1311                                                 IRQNoFlags(){0}
1312                                                 IO(Decode16, 0x0040, 0x0040, 0, 4)
1313                                                 /* IO(Decode16, 0x0048, 0x0048, 0, 4) */
1314                                         })
1315                                 } /* End Device(_SB.PCI0.LpcIsaBr.TMR) */
1316
1317                                 Device(SPKR) {  /* Speaker */
1318                                         Name(_HID,EISAID("PNP0800"))    /* AT style speaker */
1319                                         Name(_CRS, ResourceTemplate() {
1320                                                 IO(Decode16, 0x0061, 0x0061, 0, 1)
1321                                         })
1322                                 } /* End Device(_SB.PCI0.LpcIsaBr.SPKR) */
1323
1324                                 Device(PIC) {
1325                                         Name(_HID,EISAID("PNP0000"))    /* AT Interrupt Controller */
1326                                         Name(_CRS, ResourceTemplate() {
1327                                                 IRQNoFlags(){2}
1328                                                 IO(Decode16,0x0020, 0x0020, 0, 2)
1329                                                 IO(Decode16,0x00A0, 0x00A0, 0, 2)
1330                                                 /* IO(Decode16, 0x00D0, 0x00D0, 0x10, 0x02) */
1331                                                 /* IO(Decode16, 0x04D0, 0x04D0, 0x10, 0x02) */
1332                                         })
1333                                 } /* End Device(_SB.PCI0.LpcIsaBr.PIC) */
1334
1335                                 Device(MAD) { /* 8257 DMA */
1336                                         Name(_HID,EISAID("PNP0200"))    /* Hardware Device ID */
1337                                         Name(_CRS, ResourceTemplate() {
1338                                                 DMA(Compatibility,BusMaster,Transfer8){4}
1339                                                 IO(Decode16, 0x0000, 0x0000, 0x10, 0x10)
1340                                                 IO(Decode16, 0x0081, 0x0081, 0x01, 0x03)
1341                                                 IO(Decode16, 0x0087, 0x0087, 0x01, 0x01)
1342                                                 IO(Decode16, 0x0089, 0x0089, 0x01, 0x03)
1343                                                 IO(Decode16, 0x008F, 0x008F, 0x01, 0x01)
1344                                                 IO(Decode16, 0x00C0, 0x00C0, 0x10, 0x20)
1345                                         }) /* End Name(_SB.PCI0.LpcIsaBr.MAD._CRS) */
1346                                 } /* End Device(_SB.PCI0.LpcIsaBr.MAD) */
1347
1348                                 Device(COPR) {
1349                                         Name(_HID,EISAID("PNP0C04"))    /* Math Coprocessor */
1350                                         Name(_CRS, ResourceTemplate() {
1351                                                 IO(Decode16, 0x00F0, 0x00F0, 0, 0x10)
1352                                                 IRQNoFlags(){13}
1353                                         })
1354                                 } /* End Device(_SB.PCI0.LpcIsaBr.COPR) */
1355
1356                                 Device (PS2M) {
1357                                         Name (_HID, EisaId ("PNP0F13"))
1358                                         Name (_CRS, ResourceTemplate () {
1359                                                 IO (Decode16, 0x0060, 0x0060, 0x00, 0x01)
1360                                                 IO (Decode16, 0x0064, 0x0064, 0x00, 0x01)
1361                                                 IRQNoFlags () {12}
1362                                         })
1363                                         Method (_STA, 0, NotSerialized) {
1364                                                 And (FLG0, 0x04, Local0)
1365                                                 If (LEqual (Local0, 0x04)) {
1366                                                         Return (0x0F)
1367                                                 } Else {
1368                                                         Return (0x00)
1369                                                 }
1370                                         }
1371                                 }
1372
1373                                 Device (PS2K) {
1374                                         Name (_HID, EisaId ("PNP0303"))
1375                                         Method (_STA, 0, NotSerialized) {
1376                                                 And (FLG0, 0x04, Local0)
1377                                                 If (LEqual (Local0, 0x04)) {
1378                                                         Return (0x0F)
1379                                                 } Else {
1380                                                         Return (0x00)
1381                                                 }
1382                                         }
1383                                         Name (_CRS, ResourceTemplate () {
1384                                                 IO (Decode16, 0x0060, 0x0060, 0x00, 0x01)
1385                                                 IO (Decode16, 0x0064, 0x0064, 0x00, 0x01)
1386                                                 IRQNoFlags () {1}
1387                                         })
1388                                 }
1389
1390 #if 0 //acpi_create_hpet
1391                                 Device(HPET) {
1392                                         Name(_HID,EISAID("PNP0103"))
1393                                         Name(CRS, ResourceTemplate() {
1394                                                 IRQNoFlags () {0}
1395                                                 IRQNoFlags () {2}
1396                                                 IRQNoFlags () {8}
1397                                                 Memory32Fixed(ReadOnly,0xFED00000, 0x00000400, MNT)     /* 1kb reserved space */
1398                                         })
1399                                         Method(_STA, 0, NotSerialized) {
1400                                                 Return(0x0F) /* sata is visible */
1401                                         }
1402                                         Method(_CRS, 0, NotSerialized) {
1403                                                 CreateDwordField(CRS, ^MNT._BAS, HPT)
1404                                                 Store(HPBA, HPT)
1405                                                 Return(CRS)
1406                                         }
1407                                 } /* End Device(_SB.PCI0.LIBR.HPET) */
1408 #endif
1409                         } /* end LIBR */
1410
1411                         Device(HPBR) {
1412                                 Name(_ADR, 0x00140004)
1413                         } /* end HostPciBr */
1414
1415                         Device(ACAD) {
1416                                 Name(_ADR, 0x00140005)
1417                         } /* end Ac97audio */
1418
1419                         Device(ACMD) {
1420                                 Name(_ADR, 0x00140006)
1421                         } /* end Ac97modem */
1422
1423                         /* ITE8718 Support */
1424                         OperationRegion (IOID, SystemIO, 0x2E, 0x02)    /* sometimes it is 0x4E */
1425                                 Field (IOID, ByteAcc, NoLock, Preserve)
1426                                 {
1427                                         SIOI,   8,    SIOD,   8         /* 0x2E and 0x2F */
1428                                 }
1429
1430                         IndexField (SIOI, SIOD, ByteAcc, NoLock, Preserve)
1431                         {
1432                                         Offset (0x07),
1433                                 LDN,    8,      /* Logical Device Number */
1434                                         Offset (0x20),
1435                                 CID1,   8,      /* Chip ID Byte 1, 0x87 */
1436                                 CID2,   8,      /* Chip ID Byte 2, 0x12 */
1437                                         Offset (0x30),
1438                                 ACTR,   8,      /* Function activate */
1439                                         Offset (0xF0),
1440                                 APC0,   8,      /* APC/PME Event Enable Register */
1441                                 APC1,   8,      /* APC/PME Status Register */
1442                                 APC2,   8,      /* APC/PME Control Register 1 */
1443                                 APC3,   8,      /* Environment Controller Special Configuration Register */
1444                                 APC4,   8       /* APC/PME Control Register 2 */
1445                         }
1446
1447                         /* Enter the 8718 MB PnP Mode */
1448                         Method (EPNP)
1449                         {
1450                                 Store(0x87, SIOI)
1451                                 Store(0x01, SIOI)
1452                                 Store(0x55, SIOI)
1453                                 Store(0x55, SIOI) /* 8718 magic number */
1454                         }
1455                         /* Exit the 8718 MB PnP Mode */
1456                         Method (XPNP)
1457                         {
1458                                 Store (0x02, SIOI)
1459                                 Store (0x02, SIOD)
1460                         }
1461                         /*
1462                          * Keyboard PME is routed to SB700 Gevent3. We can wake
1463                          * up the system by pressing the key.
1464                          */
1465                         Method (SIOS, 1)
1466                         {
1467                                 /* We only enable KBD PME for S5. */
1468                                 If (LLess (Arg0, 0x05))
1469                                 {
1470                                         EPNP()
1471                                         /* DBGO("8718F\n") */
1472
1473                                         Store (0x4, LDN)
1474                                         Store (One, ACTR)  /* Enable EC */
1475                                         /*
1476                                         Store (0x4, LDN)
1477                                         Store (0x04, APC4)
1478                                         */  /* falling edge. which mode? Not sure. */
1479
1480                                         Store (0x4, LDN)
1481                                         Store (0x08, APC1) /* clear PME status, Use 0x18 for mouse & KBD */
1482                                         Store (0x4, LDN)
1483                                         Store (0x08, APC0) /* enable PME, Use 0x18 for mouse & KBD */
1484
1485                                         XPNP()
1486                                 }
1487                         }
1488                         Method (SIOW, 1)
1489                         {
1490                                 EPNP()
1491                                 Store (0x4, LDN)
1492                                 Store (Zero, APC0) /* disable keyboard PME */
1493                                 Store (0x4, LDN)
1494                                 Store (0xFF, APC1) /* clear keyboard PME status */
1495                                 XPNP()
1496                         }
1497
1498                         Name (CRS, ResourceTemplate ()
1499                         {
1500                                 WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
1501                                         0x0000,             // Granularity
1502                                         0x0000,             // Range Minimum
1503                                         0x00FF,             // Range Maximum
1504                                         0x0000,             // Translation Offset
1505                                         0x0100,             // Length
1506                                         ,,)
1507                                 IO (Decode16,
1508                                         0x0CF8,             // Range Minimum
1509                                         0x0CF8,             // Range Maximum
1510                                         0x01,               // Alignment
1511                                         0x08,               // Length
1512                                         )
1513
1514                                 WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
1515                                         0x0000,             // Granularity
1516                                         0x0000,             // Range Minimum
1517                                         0x03AF,             // Range Maximum
1518                                         0x0000,             // Translation Offset
1519                                         0x03B0,             // Length
1520                                         ,, , TypeStatic)
1521                                 WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
1522                                         0x0000,             // Granularity
1523                                         0x03E0,             // Range Minimum
1524                                         0x0CF7,             // Range Maximum
1525                                         0x0000,             // Translation Offset
1526                                         0x0918,             // Length
1527                                         ,, , TypeStatic)
1528
1529                                 WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
1530                                         0x0000,             // Granularity
1531                                         0x03B0,             // Range Minimum
1532                                         0x03BB,             // Range Maximum
1533                                         0x0000,             // Translation Offset
1534                                         0x000C,             // Length
1535                                         ,, , TypeStatic)
1536                                 WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
1537                                         0x0000,             // Granularity
1538                                         0x03C0,             // Range Minimum
1539                                         0x03DF,             // Range Maximum
1540                                         0x0000,             // Translation Offset
1541                                         0x0020,             // Length
1542                                         ,, , TypeStatic)
1543                                 WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
1544                                         0x0000,             // Granularity
1545                                         0x0D00,             // Range Minimum
1546                                         0xFFFF,             // Range Maximum
1547                                         0x0000,             // Translation Offset
1548                                         0xF300,             // Length
1549                                         ,, , TypeStatic)
1550                                 Memory32Fixed(READONLY, 0x000A0000, 0x00020000, VGAM)   // VGA memory space
1551
1552                                 Memory32Fixed (ReadOnly,
1553                                                 0xE0000000,         // Address Base
1554                                                 0x10000000,         // Address Length, (1MB each Bus, 256 Buses by default)
1555                                                 MMIO)
1556                         })
1557
1558                         Method (_CRS, 0, NotSerialized)
1559                         {
1560                                 CreateDWordField (CRS, \_SB.PCI0.MMIO._BAS, BAS1)
1561                                 CreateDWordField (CRS, \_SB.PCI0.MMIO._LEN, LEN1)
1562
1563                                 /*
1564                                  * Declare memory between TOM1 and 4GB as available
1565                                  * for PCI MMIO.
1566                                  * Use ShiftLeft to avoid 64bit constant (for XP).
1567                                  * This will work even if the OS does 32bit arithmetic, as
1568                                  * 32bit (0x00000000 - TOM1) will wrap and give the same
1569                                  * result as 64bit (0x100000000 - TOM1).
1570                                  */
1571                                 Store(TOM1, BAS1)
1572                                 ShiftLeft(0x10000000, 4, Local0)
1573                                 Subtract(Local0, TOM1, Local0)
1574                                 Store(Local0, LEN1)
1575                                 //DBGO(TOM1)
1576
1577                                 Return (CRS)
1578                         }
1579
1580                         /*
1581                          *
1582                          *               FIRST METHOD CALLED UPON BOOT
1583                          *
1584                          *  1. If debugging, print current OS and ACPI interpreter.
1585                          *  2. Get PCI Interrupt routing from ACPI VSM, this
1586                          *     value is based on user choice in BIOS setup.
1587                          */
1588                         Method(_INI, 0) {
1589                                 /* DBGO("\\_SB\\_INI\n") */
1590                                 /* DBGO("   DSDT.ASL code from ") */
1591                                 /* DBGO(__DATE__) */
1592                                 /* DBGO(" ") */
1593                                 /* DBGO(__TIME__) */
1594                                 /* DBGO("\n   Sleep states supported: ") */
1595                                 /* DBGO("\n") */
1596                                 /* DBGO("   \\_OS=") */
1597                                 /* DBGO(\_OS) */
1598                                 /* DBGO("\n   \\_REV=") */
1599                                 /* DBGO(\_REV) */
1600                                 /* DBGO("\n") */
1601
1602                                 /* Determine the OS we're running on */
1603                                 CkOT()
1604                                 /* On older chips, clear PciExpWakeDisEn */
1605                                 /*if (LLessEqual(\SBRI, 0x13)) {
1606                                  *      Store(0,\PWDE)
1607                                  *}
1608                                  */
1609                         } /* End Method(_SB._INI) */
1610                 } /* End Device(PCI0)  */
1611
1612                 Device(PWRB) {  /* Start Power button device */
1613                         Name(_HID, EISAID("PNP0C0C"))
1614                         Name(_UID, 0xAA)
1615                         Name(_PRW, Package () {3, 0x04})        /* wake from S1-S4 */
1616                         Name(_STA, 0x0B) /* sata is invisible */
1617                 }
1618         } /* End \_SB scope */
1619
1620         Scope(\_SI) {
1621                 Method(_SST, 1) {
1622                         /* DBGO("\\_SI\\_SST\n") */
1623                         /* DBGO("   New Indicator state: ") */
1624                         /* DBGO(Arg0) */
1625                         /* DBGO("\n") */
1626                 }
1627         } /* End Scope SI */
1628
1629         /* SMBUS Support */
1630         Mutex (SBX0, 0x00)
1631         OperationRegion (SMB0, SystemIO, 0xB00, 0x0C)
1632                 Field (SMB0, ByteAcc, NoLock, Preserve) {
1633                         HSTS,   8, /* SMBUS status */
1634                         SSTS,   8,  /* SMBUS slave status */
1635                         HCNT,   8,  /* SMBUS control */
1636                         HCMD,   8,  /* SMBUS host cmd */
1637                         HADD,   8,  /* SMBUS address */
1638                         DAT0,   8,  /* SMBUS data0 */
1639                         DAT1,   8,  /* SMBUS data1 */
1640                         BLKD,   8,  /* SMBUS block data */
1641                         SCNT,   8,  /* SMBUS slave control */
1642                         SCMD,   8,  /* SMBUS shaow cmd */
1643                         SEVT,   8,  /* SMBUS slave event */
1644                         SDAT,   8  /* SMBUS slave data */
1645         }
1646
1647         Method (WCLR, 0, NotSerialized) { /* clear SMBUS status register */
1648                 Store (0x1E, HSTS)
1649                 Store (0xFA, Local0)
1650                 While (LAnd (LNotEqual (And (HSTS, 0x1E), Zero), LGreater (Local0, Zero))) {
1651                         Stall (0x64)
1652                         Decrement (Local0)
1653                 }
1654
1655                 Return (Local0)
1656         }
1657
1658         Method (SWTC, 1, NotSerialized) {
1659                 Store (Arg0, Local0)
1660                 Store (0x07, Local2)
1661                 Store (One, Local1)
1662                 While (LEqual (Local1, One)) {
1663                         Store (And (HSTS, 0x1E), Local3)
1664                         If (LNotEqual (Local3, Zero)) { /* read sucess */
1665                                 If (LEqual (Local3, 0x02)) {
1666                                         Store (Zero, Local2)
1667                                 }
1668
1669                                 Store (Zero, Local1)
1670                         }
1671                         Else {
1672                                 If (LLess (Local0, 0x0A)) { /* read failure */
1673                                         Store (0x10, Local2)
1674                                         Store (Zero, Local1)
1675                                 }
1676                                 Else {
1677                                         Sleep (0x0A) /* 10 ms, try again */
1678                                         Subtract (Local0, 0x0A, Local0)
1679                                 }
1680                         }
1681                 }
1682
1683                 Return (Local2)
1684         }
1685
1686         Method (SMBR, 3, NotSerialized) {
1687                 Store (0x07, Local0)
1688                 If (LEqual (Acquire (SBX0, 0xFFFF), Zero)) {
1689                         Store (WCLR (), Local0) /* clear SMBUS status register before read data */
1690                         If (LEqual (Local0, Zero)) {
1691                                 Release (SBX0)
1692                                 Return (0x0)
1693                         }
1694
1695                         Store (0x1F, HSTS)
1696                         Store (Or (ShiftLeft (Arg1, One), One), HADD)
1697                         Store (Arg2, HCMD)
1698                         If (LEqual (Arg0, 0x07)) {
1699                                 Store (0x48, HCNT) /* read byte */
1700                         }
1701
1702                         Store (SWTC (0x03E8), Local1) /* 1000 ms */
1703                         If (LEqual (Local1, Zero)) {
1704                                 If (LEqual (Arg0, 0x07)) {
1705                                         Store (DAT0, Local0)
1706                                 }
1707                         }
1708                         Else {
1709                                 Store (Local1, Local0)
1710                         }
1711
1712                         Release (SBX0)
1713                 }
1714
1715                 /* DBGO("the value of SMBusData0 register ") */
1716                 /* DBGO(Arg2) */
1717                 /* DBGO(" is ") */
1718                 /* DBGO(Local0) */
1719                 /* DBGO("\n") */
1720
1721                 Return (Local0)
1722         }
1723
1724         /* THERMAL */
1725         Scope(\_TZ) {
1726                 Name (KELV, 2732)
1727                 Name (THOT, 800)
1728                 Name (TCRT, 850)
1729
1730                 ThermalZone(TZ00) {
1731                         Method(_AC0,0) {        /* Active Cooling 0 (0=highest fan speed) */
1732                                 /* DBGO("\\_TZ\\TZ00\\_AC0\n") */
1733                                 Return(Add(0, 2730))
1734                         }
1735                         Method(_AL0,0) {        /* Returns package of cooling device to turn on */
1736                                 /* DBGO("\\_TZ\\TZ00\\_AL0\n") */
1737                                 Return(Package() {\_TZ.TZ00.FAN0})
1738                         }
1739                         Device (FAN0) {
1740                                 Name(_HID, EISAID("PNP0C0B"))
1741                                 Name(_PR0, Package() {PFN0})
1742                         }
1743
1744                         PowerResource(PFN0,0,0) {
1745                                 Method(_STA) {
1746                                         Store(0xF,Local0)
1747                                         Return(Local0)
1748                                 }
1749                                 Method(_ON) {
1750                                         /* DBGO("\\_TZ\\TZ00\\FAN0 _ON\n") */
1751                                 }
1752                                 Method(_OFF) {
1753                                         /* DBGO("\\_TZ\\TZ00\\FAN0 _OFF\n") */
1754                                 }
1755                         }
1756
1757                         Method(_HOT,0) {        /* return hot temp in tenths degree Kelvin */
1758                                 /* DBGO("\\_TZ\\TZ00\\_HOT\n") */
1759                                 Return (Add (THOT, KELV))
1760                         }
1761                         Method(_CRT,0) {        /* return critical temp in tenths degree Kelvin */
1762                                 /* DBGO("\\_TZ\\TZ00\\_CRT\n") */
1763                                 Return (Add (TCRT, KELV))
1764                         }
1765                         Method(_TMP,0) {        /* return current temp of this zone */
1766                                 Store (SMBR (0x07, 0x4C,, 0x00), Local0)
1767                                 If (LGreater (Local0, 0x10)) {
1768                                         Store (Local0, Local1)
1769                                 }
1770                                 Else {
1771                                         Add (Local0, THOT, Local0)
1772                                         Return (Add (400, KELV))
1773                                 }
1774
1775                                 Store (SMBR (0x07, 0x4C, 0x01), Local0)
1776                                 /* only the two MSBs in the external temperature low byte are used, resolution 0.25. We ignore it */
1777                                 /* Store (SMBR (0x07, 0x4C, 0x10), Local2) */
1778                                 If (LGreater (Local0, 0x10)) {
1779                                         If (LGreater (Local0, Local1)) {
1780                                                 Store (Local0, Local1)
1781                                         }
1782
1783                                         Multiply (Local1, 10, Local1)
1784                                         Return (Add (Local1, KELV))
1785                                 }
1786                                 Else {
1787                                         Add (Local0, THOT, Local0)
1788                                         Return (Add (400 , KELV))
1789                                 }
1790                         } /* end of _TMP */
1791                 } /* end of TZ00 */
1792         }
1793 }
1794 /* End of ASL file */