2 # This file is part of the coreboot project.
4 # Copyright (C) 2011 - 2012 Advanced Micro Devices, Inc.
6 # This program is free software; you can redistribute it and/or modify
7 # it under the terms of the GNU General Public License as published by
8 # the Free Software Foundation; version 2 of the License.
10 # This program is distributed in the hope that it will be useful,
11 # but WITHOUT ANY WARRANTY; without even the implied warranty of
12 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 # GNU General Public License for more details.
15 # You should have received a copy of the GNU General Public License
16 # along with this program; if not, write to the Free Software
17 # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 if BOARD_SUPERMICRO_H8QGI
22 config BOARD_SPECIFIC_OPTIONS
25 select CPU_AMD_AGESA_FAMILY15
26 select CPU_AMD_SOCKET_G34
27 select NORTHBRIDGE_AMD_AGESA_FAMILY15_ROOT_COMPLEX
28 select NORTHBRIDGE_AMD_AGESA_FAMILY15
29 select NORTHBRIDGE_AMD_CIMX_RD890
30 select SOUTHBRIDGE_AMD_CIMX_SB700
31 select SUPERIO_WINBOND_W83627DHG
32 select SUPERIO_NUVOTON_WPCM450
33 select DRIVERS_I2C_W83795
36 select HAVE_BUS_CONFIG
37 select HAVE_OPTION_TABLE
38 select HAVE_PIRQ_TABLE
40 select HAVE_HARD_RESET
41 select SERIAL_CPU_INIT
42 select HAVE_ACPI_TABLES
43 select BOARD_ROMSIZE_KB_2048
45 #select MMCONF_SUPPORT_DEFAULT #TODO enable it to resolve Multicore IO conflict
49 default supermicro/h8qgi
51 config MAINBOARD_PART_NUMBER
55 config HW_MEM_HOLE_SIZEK
63 config MAX_PHYSICAL_CPUS
67 config HW_MEM_HOLE_SIZE_AUTO_INC
103 though UARTs are on the NUVOTON BMC, port 0x164E
104 PS2 keyboard and mouse are on SUPERIO_WINBOND_W83627DHG, port 0x2E
106 config DRIVERS_PS2_KEYBOARD
110 config WARNINGS_ARE_ERRORS
114 config ONBOARD_VGA_IS_PRIMARY
127 endif # BOARD_SUPERMICRO_H8QGI