nvidia/mcp55: Move HAVE_HARD_RESET to southbridge
[coreboot.git] / src / mainboard / supermicro / h8dmr_fam10 / Kconfig
1 if BOARD_SUPERMICRO_H8DMR_FAM10
2
3 config BOARD_SPECIFIC_OPTIONS # dummy
4         def_bool y
5         select ARCH_X86
6         select CPU_AMD_SOCKET_F_1207
7         select DIMM_DDR2
8         select DIMM_REGISTERED
9         select NORTHBRIDGE_AMD_AMDFAM10
10         select SOUTHBRIDGE_NVIDIA_MCP55
11         select MCP55_USE_NIC
12         select MCP55_USE_AZA
13         select SUPERIO_WINBOND_W83627HF
14         select HAVE_BUS_CONFIG
15         select HAVE_OPTION_TABLE
16         select HAVE_PIRQ_TABLE
17         select HAVE_MP_TABLE
18         select LIFT_BSP_APIC_ID
19         select AMDMCT
20         select BOARD_ROMSIZE_KB_1024
21         select RAMINIT_SYSINFO
22         select ENABLE_APIC_EXT_ID
23         select QRANK_DIMM_SUPPORT
24
25 config MAINBOARD_DIR
26         string
27         default supermicro/h8dmr_fam10
28
29 config DCACHE_RAM_BASE
30         hex
31         default 0xc4000
32
33 config DCACHE_RAM_SIZE
34         hex
35         default 0x0c000
36
37 config DCACHE_RAM_GLOBAL_VAR_SIZE
38         hex
39         default 0x04000
40
41 config RAMBASE
42         hex
43         default 0x200000
44
45 config RAMTOP
46         hex
47         default 0x1000000
48
49 config HEAP_SIZE
50         hex
51         default 0xc0000
52
53 config APIC_ID_OFFSET
54         hex
55         default 0x0
56
57 config MEM_TRAIN_SEQ
58         int
59         default 2
60
61 config SB_HT_CHAIN_ON_BUS0
62         int
63         default 2
64
65 config MAINBOARD_PART_NUMBER
66         string
67         default "H8DMR-i2 (Fam10)"
68
69 config MAX_CPUS
70         int
71         default 8
72
73 config MAX_PHYSICAL_CPUS
74         int
75         default 2
76
77 config HT_CHAIN_END_UNITID_BASE
78         hex
79         default 0x20
80
81 config HT_CHAIN_UNITID_BASE
82         hex
83         default 0x1
84
85 config SB_HT_CHAIN_ON_BUS0
86         int
87         default 2
88
89 config IRQ_SLOT_COUNT
90         int
91         default 11
92
93 config AMD_UCODE_PATCH_FILE
94         string
95         default "mc_patch_0100009f.h"
96
97 config SERIAL_CPU_INIT
98         bool
99         default n
100
101 endif # BOARD_SUPERMICRO_H8DMR_FAM10