afe96bf2fbe7985a505deca90a42bfe1174b09e0
[coreboot.git] / src / mainboard / supermicro / h8dme / Kconfig
1 if BOARD_SUPERMICRO_H8DME
2
3 config BOARD_SPECIFIC_OPTIONS # dummy
4         def_bool y
5         select ARCH_X86
6         select CPU_AMD_SOCKET_F
7         select NORTHBRIDGE_AMD_AMDK8
8         select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
9         select SOUTHBRIDGE_NVIDIA_MCP55
10         select SUPERIO_WINBOND_W83627HF
11         select HAVE_OPTION_TABLE
12         select HAVE_BUS_CONFIG
13         select HAVE_PIRQ_TABLE
14         select HAVE_MP_TABLE
15         select USE_DCACHE_RAM
16         select HAVE_HARD_RESET
17         #select AP_CODE_IN_CAR
18         select LIFT_BSP_APIC_ID
19         select BOARD_ROMSIZE_KB_1024
20
21 config MAINBOARD_DIR
22         string
23         default supermicro/h8dme
24
25 config DCACHE_RAM_BASE
26         hex
27         default 0xc8000
28
29 config DCACHE_RAM_SIZE
30         hex
31         default 0x08000
32
33 config DCACHE_RAM_GLOBAL_VAR_SIZE
34         hex
35         default 0x01000
36
37 config APIC_ID_OFFSET
38         hex
39         default 0x10
40
41 config MEM_TRAIN_SEQ
42         int
43         default 1
44
45 config SB_HT_CHAIN_ON_BUS0
46         int
47         default 2
48
49 config MAINBOARD_PART_NUMBER
50         string
51         default "H8DME-2"
52
53 config HW_MEM_HOLE_SIZEK
54         hex
55         default 0x100000
56
57 config MAX_CPUS
58         int
59         default 4
60
61 config MAX_PHYSICAL_CPUS
62         int
63         default 2
64
65 config HT_CHAIN_END_UNITID_BASE
66         hex
67         default 0x20
68
69 config HT_CHAIN_UNITID_BASE
70         hex
71         default 0x0
72
73 config SB_HT_CHAIN_ON_BUS0
74         int
75         default 2
76
77 config IRQ_SLOT_COUNT
78         int
79         default 11
80
81 config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
82         hex
83         default 0x15d9
84
85 config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
86         hex
87         default 0x1511
88
89 endif # BOARD_SUPERMICRO_H8DME