1 chip northbridge/amd/amdk8/root_complex # Root complex
2 device lapic_cluster 0 on # (L)APIC cluster
3 chip cpu/amd/socket_940 # CPU socket
4 device lapic 0 on end # Local APIC of the CPU
7 device pci_domain 0 on # PCI domain
8 chip northbridge/amd/amdk8 # Northbridge / RAM controller
10 device pci 18.0 on # Link 0 == LDT 0
11 chip southbridge/nvidia/ck804 # Southbridge
12 device pci 0.0 on end # HT
13 device pci 1.0 on # LPC
14 chip superio/smsc/lpc47m10x # Super I/O
15 device pnp 2e.0 off # Floppy
20 device pnp 2e.3 off # Parallel port
24 device pnp 2e.4 on # Com1
28 device pnp 2e.5 off # Com2
32 device pnp 2e.7 off # PS/2 keyboard
40 device pci 1.1 on # SM 0
41 chip drivers/generic/generic # DIMM 0-0-0
44 chip drivers/generic/generic # DIMM 0-0-1
47 chip drivers/generic/generic # DIMM 0-1-0
50 chip drivers/generic/generic # DIMM 0-1-1
53 chip drivers/generic/generic # DIMM 1-0-0
56 chip drivers/generic/generic # DIMM 1-0-1
59 chip drivers/generic/generic # DIMM 1-1-0
62 chip drivers/generic/generic # DIMM 1-1-1
66 device pci 1.1 on # SM 1
67 # PCI device SMBus address will
68 # depend on addon PCI device, do
69 # we need to scan_smbus_bus?
70 # chip drivers/generic/generic # PCIXA slot 1
71 # device i2c 50 on end
73 # chip drivers/generic/generic # PCIXB slot 1
74 # device i2c 51 on end
76 # chip drivers/generic/generic # PCIXB slot 2
77 # device i2c 52 on end
79 # chip drivers/generic/generic # PCI slot 1
80 # device i2c 53 on end
82 # chip drivers/generic/generic # Master CK804 PCI-E
83 # device i2c 54 on end
85 # chip drivers/generic/generic # Slave CK804 PCI-E
86 # device i2c 55 on end
88 chip drivers/generic/generic # MAC EEPROM
92 device pci 2.0 on end # USB 1.1
93 device pci 2.1 on end # USB 2
94 device pci 4.0 on end # ACI
95 device pci 4.1 off end # MCI
96 device pci 6.0 on end # IDE
97 device pci 7.0 on end # SATA 1
98 device pci 8.0 on end # SATA 0
99 device pci 9.0 on end # PCI
100 device pci a.0 on end # NIC
101 device pci b.0 off end # PCI E 3
102 device pci c.0 off end # PCI E 2
103 device pci d.0 off end # PCI E 1
104 device pci e.0 on end # PCI E 0
105 register "ide0_enable" = "1"
106 register "ide1_enable" = "1"
107 register "sata0_enable" = "1"
108 register "sata1_enable" = "1"
109 # 1: SMBus under 2e.8, 2: SM0 3: SM1
110 register "mac_eeprom_smbus" = "3"
111 register "mac_eeprom_addr" = "0x51"
114 device pci 18.0 on end # Link 2
115 device pci 18.1 on end
116 device pci 18.2 on end
117 device pci 18.3 on end
119 chip northbridge/amd/amdk8 # Northbridge / RAM controller
120 device pci 19.0 on end # Link 0
121 device pci 19.0 on # Link 1 == LDT 1
122 chip southbridge/nvidia/ck804 # Southbridge
123 device pci 0.0 on end # HT
124 device pci 1.0 on end # LPC
125 device pci 1.1 off end # SM
126 device pci 2.0 off end # USB 1.1
127 device pci 2.1 off end # USB 2
128 device pci 4.0 off end # ACI
129 device pci 4.1 off end # MCI
130 device pci 6.0 off end # IDE
131 device pci 7.0 off end # SATA 1
132 device pci 8.0 off end # SATA 0
133 device pci 9.0 off end # PCI
134 device pci a.0 on end # NIC
135 device pci b.0 off end # PCI E 3
136 device pci c.0 off end # PCI E 2
137 device pci d.0 off end # PCI E 1
138 device pci e.0 on end # PCI E 0
139 # 1: SMBus under 2e.8, 2: SM0 3: SM1
140 register "mac_eeprom_smbus" = "3"
141 register "mac_eeprom_addr" = "0x51"
144 device pci 19.0 on end
145 device pci 19.1 on end
146 device pci 19.2 on end
147 device pci 19.3 on end