1 uses CONFIG_HAVE_MP_TABLE
3 uses CONFIG_HAVE_PIRQ_TABLE
4 uses CONFIG_USE_FALLBACK_IMAGE
5 uses CONFIG_HAVE_FALLBACK_BOOT
6 uses CONFIG_HAVE_HARD_RESET
7 uses CONFIG_IRQ_SLOT_COUNT
8 uses CONFIG_HAVE_OPTION_TABLE
10 uses CONFIG_MAX_PHYSICAL_CPUS
11 uses CONFIG_LOGICAL_CPUS
14 uses CONFIG_FALLBACK_SIZE
16 uses CONFIG_ROM_SECTION_SIZE
17 uses CONFIG_ROM_IMAGE_SIZE
18 uses CONFIG_ROM_SECTION_SIZE
19 uses CONFIG_ROM_SECTION_OFFSET
20 uses CONFIG_ROM_PAYLOAD
21 uses CONFIG_ROM_PAYLOAD_START
22 uses CONFIG_COMPRESSED_PAYLOAD_LZMA
23 uses CONFIG_PRECOMPRESSED_PAYLOAD
24 uses CONFIG_PAYLOAD_SIZE
26 uses CONFIG_XIP_ROM_SIZE
27 uses CONFIG_XIP_ROM_BASE
28 uses CONFIG_STACK_SIZE
30 uses CONFIG_USE_OPTION_TABLE
31 uses CONFIG_LB_CKS_RANGE_START
32 uses CONFIG_LB_CKS_RANGE_END
33 uses CONFIG_LB_CKS_LOC
35 uses CONFIG_MAINBOARD_PART_NUMBER
36 uses CONFIG_MAINBOARD_VENDOR
37 uses CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
38 uses CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
39 uses COREBOOT_EXTRA_VERSION
42 uses CONFIG_CROSS_COMPILE
46 uses CONFIG_TTYS0_BAUD
47 uses CONFIG_TTYS0_BASE
49 uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL
50 uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL
51 uses CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL
52 uses CONFIG_CONSOLE_SERIAL8250
53 uses CONFIG_HAVE_INIT_TIMER
55 uses CONFIG_CONSOLE_VGA
56 uses CONFIG_PCI_ROM_RUN
57 uses CONFIG_HW_MEM_HOLE_SIZEK
58 uses CONFIG_K8_HT_FREQ_1G_SUPPORT
60 uses CONFIG_USE_DCACHE_RAM
61 uses CONFIG_DCACHE_RAM_BASE
62 uses CONFIG_DCACHE_RAM_SIZE
64 uses CONFIG_USE_PRINTK_IN_CAR
66 uses CONFIG_ENABLE_APIC_EXT_ID
67 uses CONFIG_APIC_ID_OFFSET
68 uses CONFIG_LIFT_BSP_APIC_ID
70 uses CONFIG_HT_CHAIN_UNITID_BASE
71 uses CONFIG_HT_CHAIN_END_UNITID_BASE
72 uses CONFIG_SB_HT_CHAIN_ON_BUS0
73 uses CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY
75 ## CONFIG_ROM_SIZE is the size of boot ROM that this board will use.
77 #default CONFIG_ROM_SIZE=524288
80 default CONFIG_ROM_SIZE=1048576
83 ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use
85 default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE
92 ## Build code for the fallback boot
94 default CONFIG_HAVE_FALLBACK_BOOT=1
97 ## Build code to reset the motherboard from coreboot
99 default CONFIG_HAVE_HARD_RESET=1
102 ## Build code to export a programmable irq routing table
104 default CONFIG_HAVE_PIRQ_TABLE=1
105 default CONFIG_IRQ_SLOT_COUNT=11
108 ## Build code to export an x86 MP table
109 ## Useful for specifying IRQ routing values
111 default CONFIG_HAVE_MP_TABLE=1
114 ## Build code to export a CMOS option table
116 default CONFIG_HAVE_OPTION_TABLE=1
119 ## Move the default coreboot cmos range off of AMD RTC registers
121 default CONFIG_LB_CKS_RANGE_START=49
122 default CONFIG_LB_CKS_RANGE_END=122
123 default CONFIG_LB_CKS_LOC=123
126 ## Build code for SMP support
127 ## Only worry about 2 micro processors
130 default CONFIG_MAX_CPUS=4
131 default CONFIG_MAX_PHYSICAL_CPUS=2
132 default CONFIG_LOGICAL_CPUS=1
135 default CONFIG_HW_MEM_HOLE_SIZEK=0x100000
137 #Opteron K8 1G HT Support
138 default CONFIG_K8_HT_FREQ_1G_SUPPORT=1
140 ##HT Unit ID offset, default is 1, the typical one
141 default CONFIG_HT_CHAIN_UNITID_BASE=0x0
143 ##real SB Unit ID, default is 0x20, mean dont touch it at last
144 #default CONFIG_HT_CHAIN_END_UNITID_BASE=0x0
146 #make the SB HT chain on bus 0, default is not (0)
147 default CONFIG_SB_HT_CHAIN_ON_BUS0=2
149 ##only offset for SB chain?, default is yes(1)
150 default CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY=0
153 default CONFIG_CONSOLE_VGA=1
154 default CONFIG_PCI_ROM_RUN=1
157 ## enable CACHE_AS_RAM specifics
159 default CONFIG_USE_DCACHE_RAM=1
160 default CONFIG_DCACHE_RAM_BASE=0xcf000
161 default CONFIG_DCACHE_RAM_SIZE=0x1000
162 default CONFIG_USE_INIT=0
164 default CONFIG_ENABLE_APIC_EXT_ID=1
165 default CONFIG_APIC_ID_OFFSET=0x10
166 default CONFIG_LIFT_BSP_APIC_ID=0
170 ## Build code to setup a generic IOAPIC
172 default CONFIG_IOAPIC=1
175 ## Clean up the motherboard id strings
177 default CONFIG_MAINBOARD_PART_NUMBER="ultra40"
178 default CONFIG_MAINBOARD_VENDOR="sunw"
180 default CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x108e
181 default CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x40
184 ### coreboot layout values
187 ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy.
188 default CONFIG_ROM_IMAGE_SIZE = 65536
191 ## Use a small 8K stack
193 default CONFIG_STACK_SIZE=0x2000
196 ## Use a small 16K heap
198 default CONFIG_HEAP_SIZE=0x4000
201 ## Only use the option table in a normal image
203 default CONFIG_USE_OPTION_TABLE = !CONFIG_USE_FALLBACK_IMAGE
206 ## Coreboot C code runs at this location in RAM
208 default CONFIG_RAMBASE=0x00004000
211 ## Load the payload from the ROM
213 default CONFIG_ROM_PAYLOAD = 1
216 ### Defaults of options that you may want to override in the target config file
220 ## The default compiler
222 default CC="$(CONFIG_CROSS_COMPILE)gcc -m32"
226 ## Disable the gdb stub by default
228 default CONFIG_GDB_STUB=0
230 default CONFIG_USE_PRINTK_IN_CAR=1
233 ## The Serial Console
236 # To Enable the Serial Console
237 default CONFIG_CONSOLE_SERIAL8250=1
239 ## Select the serial console baud rate
240 default CONFIG_TTYS0_BAUD=115200
241 #default CONFIG_TTYS0_BAUD=57600
242 #default CONFIG_TTYS0_BAUD=38400
243 #default CONFIG_TTYS0_BAUD=19200
244 #default CONFIG_TTYS0_BAUD=9600
245 #default CONFIG_TTYS0_BAUD=4800
246 #default CONFIG_TTYS0_BAUD=2400
247 #default CONFIG_TTYS0_BAUD=1200
249 # Select the serial console base port
250 default CONFIG_TTYS0_BASE=0x3f8
252 # Select the serial protocol
253 # This defaults to 8 data bits, 1 stop bit, and no parity
254 default CONFIG_TTYS0_LCS=0x3
257 ### Select the coreboot loglevel
259 ## EMERG 1 system is unusable
260 ## ALERT 2 action must be taken immediately
261 ## CRIT 3 critical conditions
262 ## ERR 4 error conditions
263 ## WARNING 5 warning conditions
264 ## NOTICE 6 normal but significant condition
265 ## INFO 7 informational
266 ## CONFIG_DEBUG 8 debug-level messages
267 ## SPEW 9 Way too many details
269 ## Request this level of debugging output
270 default CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
271 ## At a maximum only compile in this level of debugging
272 default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
275 ## Select power on after power fail setting
276 default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
283 default CONFIG_CBFS=1