nvidia/ck804: Move HAVE_HARD_RESET to southbridge
[coreboot.git] / src / mainboard / sunw / ultra40 / Kconfig
1 if BOARD_SUNW_ULTRA40
2
3 config BOARD_SPECIFIC_OPTIONS # dummy
4         def_bool y
5         select ARCH_X86
6         select CPU_AMD_SOCKET_940
7         select NORTHBRIDGE_AMD_AMDK8
8         select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
9         select SOUTHBRIDGE_NVIDIA_CK804
10         select SUPERIO_SMSC_LPC47M10X
11         select HAVE_OPTION_TABLE
12         select HAVE_BUS_CONFIG
13         select HAVE_PIRQ_TABLE
14         select HAVE_MP_TABLE
15         select BOARD_ROMSIZE_KB_1024
16         select CK804_USE_NIC
17         select CK804_USE_ACI
18         select QRANK_DIMM_SUPPORT
19         select K8_ALLOCATE_IO_RANGE
20
21 config MAINBOARD_DIR
22         string
23         default sunw/ultra40
24
25 config DCACHE_RAM_BASE
26         hex
27         default 0xcf000
28
29 config DCACHE_RAM_SIZE
30         hex
31         default 0x01000
32
33 config APIC_ID_OFFSET
34         hex
35         default 0x10
36
37 config K8_REV_F_SUPPORT
38         bool
39         default n
40
41 config CK804_NUM
42         int
43         default 2
44
45 config SB_HT_CHAIN_ON_BUS0
46         int
47         default 2
48
49 config MAINBOARD_PART_NUMBER
50         string
51         default "Ultra 40"
52
53 config MAX_CPUS
54         int
55         default 4
56
57 config MAX_PHYSICAL_CPUS
58         int
59         default 2
60
61 config HT_CHAIN_END_UNITID_BASE
62         hex
63         default 0x20
64
65 config HT_CHAIN_UNITID_BASE
66         hex
67         default 0x0
68
69 config SB_HT_CHAIN_ON_BUS0
70         int
71         default 2
72
73 config IRQ_SLOT_COUNT
74         int
75         default 11
76
77 endif # BOARD_SUNW_ULTRA40