2 * This file is part of the coreboot project.
4 * Copyright (C) 2008 Advanced Micro Devices, Inc.
5 * Copyright (C) 2010 Siemens AG, Inc.
6 * (Written by Josef Kellermann <joseph.kellermann@heitec.de> for Siemens AG, Inc.)
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 #include <console/console.h>
24 #include <arch/acpi.h>
25 #include <arch/ioapic.h>
26 #include <arch/smp/mpspec.h>
27 #include <device/pci.h>
28 #include <device/pci_ids.h>
29 #include <cpu/x86/msr.h>
30 #include <cpu/amd/mtrr.h>
31 #include <cpu/amd/amdk8_sysconf.h>
32 #include <../../../northbridge/amd/amdk8/acpi.h>
34 #include <cpu/amd/model_fxx_powernow.h>
35 #include <southbridge/amd/rs690/rs690.h>
37 #define DUMP_ACPI_TABLES 0
39 #ifndef CONFIG_LINT01_CONVERSION
40 #define CONFIG_LINT01_CONVERSION 1
46 * Assume the max pstate number is 8
47 * 0x21(33 bytes) is one package length of _PSS package
51 #define Defpkglength 0x21
52 #define GLOBAL_VARS_SIZE 0x100
61 } __attribute__((packed)) global_vars_t;
63 static void acpi_write_gvars(global_vars_t *gvars)
68 memset((void *)gvars, 0, GLOBAL_VARS_SIZE);
70 gvars->pcba = EXT_CONF_BASE_ADDRESS;
71 dev = dev_find_slot(0, PCI_DEVFN(0,0));
72 res = probe_resource(dev, 0x1C);
74 gvars->pcba = res->base;
79 static void acpi_create_my_hpet(acpi_hpet_t *hpet)
81 #define HPET_ADDR 0xfed00000ULL
82 acpi_header_t *header=&(hpet->header);
83 acpi_addr_t *addr=&(hpet->addr);
85 memset((void *)hpet, 0, sizeof(acpi_hpet_t));
87 /* fill out header fields */
88 memcpy(header->signature, "HPET", 4);
89 memcpy(header->oem_id, OEM_ID, 6);
90 memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
91 memcpy(header->asl_compiler_id, ASLC, 4);
93 header->length = sizeof(acpi_hpet_t);
96 /* fill out HPET address */
97 addr->space_id = 0; /* Memory */
100 addr->addrl = HPET_ADDR & 0xffffffff;
101 addr->addrh = HPET_ADDR >> 32;
103 hpet->id = 0x43538301;
107 header->checksum = acpi_checksum((void *)hpet, sizeof(acpi_hpet_t));
110 #if DUMP_ACPI_TABLES == 1
111 static void dump_mem(u32 start, u32 end)
114 print_debug("dump_mem:");
115 for (i = start; i < end; i++) {
116 if ((i & 0xf) == 0) {
117 printk(BIOS_DEBUG, "\n%08x:", i);
119 printk(BIOS_DEBUG, " %02x", (u8)*((u8 *)i));
125 extern const unsigned char AmlCode[];
127 unsigned long acpi_fill_mcfg(unsigned long current)
129 struct resource *res;
130 resource_t mmconf_base = EXT_CONF_BASE_ADDRESS; // default
132 device_t dev = dev_find_slot(0,PCI_DEVFN(0,0));
133 // we report mmconf base
134 res = probe_resource(dev, 0x1C);
136 mmconf_base = res->base;
138 current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *)current, mmconf_base, 0x0, 0x0, 0x1f); // Fix me: should i reserve 255 busses ?
143 unsigned long acpi_fill_madt(unsigned long current)
145 /* create all subtables for processors */
146 current = acpi_create_madt_lapics(current);
148 /* Write SB600 IOAPIC, only one */
149 current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, 2,
151 #if CONFIG_LINT01_CONVERSION == 0
152 current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
153 current, 0, 0, 2, 0);
155 current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
156 current, 0, 9, 9, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW);
158 /* 0: mean bus 0--->ISA */
161 /* 5 mean: 0101 --> Edige-triggered, Active high */
163 /* create all subtables for processors */
164 current = acpi_create_madt_lapic_nmis(current, MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH, 1);
165 /* 1: LINT1 connect to NMI */
166 set_nbcfg_enable_bits(dev_find_slot(0, PCI_DEVFN(0x18, 0)), 0x68, 1 << 16, 1 << 16); // Local Interrupt Conversion Enable
171 unsigned long acpi_fill_ssdt_generator(unsigned long current, const char *oem_table_id) {
173 amd_model_fxx_generate_powernow(pm_base + 8, 6, 1);
174 return (unsigned long) (acpigen_get_current());
177 #define ALIGN_CURRENT current = ((current + 0x0f) & -0x10)
179 unsigned long write_acpi_tables(unsigned long start)
181 unsigned long current;
196 get_bus_conf(); /* it will get sblk, pci1234, hcdn, and sbdn */
198 /* Align ACPI tables to 16byte */
202 printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx...\n", start);
204 /* We need at least an RSDP and an RSDT Table */
205 rsdp = (acpi_rsdp_t *) current;
206 current += sizeof(acpi_rsdp_t);
208 rsdt = (acpi_rsdt_t *) current;
209 current += sizeof(acpi_rsdt_t);
211 xsdt = (acpi_xsdt_t *) current;
212 current += sizeof(acpi_xsdt_t);
215 /* clear all table memory */
216 memset((void *)start, 0, current - start);
218 acpi_write_rsdp(rsdp, rsdt, xsdt);
219 acpi_write_rsdt(rsdt);
220 acpi_write_xsdt(xsdt);
222 * We explicitly add these tables later on:
224 current = ALIGN(current, 64);
226 printk(BIOS_DEBUG, "ACPI: * FACS\n");
227 facs = (acpi_facs_t *) current;
228 acpi_create_facs(facs);
229 current += sizeof(acpi_facs_t);
232 printk(BIOS_DEBUG, "ACPI: * HPET\n");
233 hpet = (acpi_hpet_t *) current;
234 acpi_create_my_hpet(hpet);
235 current += sizeof(acpi_hpet_t);
236 acpi_add_table(rsdp, hpet);
238 /* If we want to use HPET Timers Linux wants an MADT */
239 printk(BIOS_DEBUG, "ACPI: * MADT\n");
240 madt = (acpi_madt_t *) current;
241 acpi_create_madt(madt);
242 current += madt->header.length;
243 acpi_add_table(rsdp, madt);
246 printk(BIOS_DEBUG, "ACPI: * MCFG\n");
247 mcfg = (acpi_mcfg_t *) current;
248 acpi_create_mcfg(mcfg);
249 current += mcfg->header.length;
250 acpi_add_table(rsdp, mcfg);
253 printk(BIOS_DEBUG, "ACPI: * SSDT\n");
254 ssdt = (acpi_header_t *)current;
255 acpi_create_ssdt_generator(ssdt, ACPI_TABLE_CREATOR);
256 current += ssdt->length;
257 acpi_add_table(rsdp, ssdt);
260 printk(BIOS_DEBUG, "ACPI: * DSDT\n");
261 dsdt = (acpi_header_t *)current;
262 memcpy(dsdt, &AmlCode, sizeof(acpi_header_t));
263 current += dsdt->length;
264 memcpy(dsdt, &AmlCode, dsdt->length);
266 /* Pack gvars into the ACPI table area */
267 for (i=0; i < dsdt->length; i++) {
268 if (*(u32*)(((u32)dsdt) + i) == 0xBADEAFFE) {
269 printk(BIOS_DEBUG, "ACPI: Patching up globals in DSDT at offset 0x%04x -> 0x%08lx\n", i, current);
270 *(u32*)(((u32)dsdt) + i) = current;
276 acpi_write_gvars((global_vars_t *)current);
277 current += GLOBAL_VARS_SIZE;
278 /* We patched up the DSDT, so we need to recalculate the checksum */
280 dsdt->checksum = acpi_checksum((void *)dsdt, dsdt->length);
281 printk(BIOS_DEBUG, "ACPI: * DSDT @ %p Length %x\n", dsdt, dsdt->length);
284 printk(BIOS_DEBUG, "ACPI: * FADT\n");
285 fadt = (acpi_fadt_t *) current;
286 current += sizeof(acpi_fadt_t);
287 acpi_create_fadt(fadt, facs, dsdt);
288 acpi_add_table(rsdp, fadt);
291 printk(BIOS_DEBUG, "ACPI: * SRAT\n");
292 srat = (acpi_srat_t *) current;
293 acpi_create_srat(srat);
294 acpi_add_table(rsdp, srat);
296 printk(BIOS_DEBUG, "current = %lx\n", current);
298 printk(BIOS_INFO, "ACPI: done.\n");